B0193ax1 Ab
B0193ax1 Ab
B0193ax1 Ab
Rev AB
November 30, 2011
I/A Series
System
Integrated Control
Block Descriptions
Volume 1 of 3,
ACCUM DTIME
Invensys, Foxboro, FoxCAE, FoxView, InFusion, I/A Series, the Invensys logo, and EXACT are trademarks of
Invensys plc, its subsidiaries, and affiliates.
All other brand names may be trademarks of their respective owners.
Copyright 1990-2011 Invensys Systems, Inc.
All rights reserved
SOFTWARE LICENSE AND COPYRIGHT INFORMATION
Before using the Invensys Systems, Inc. supplied software supported by this documentation, you
should read and understand the following information concerning copyrighted software.
1. The license provisions in the software license for your system govern your obligations
and usage rights to the software described in this documentation. If any portion of
those license provisions is violated, Invensys Systems, Inc. will no longer provide you
with support services and assumes no further responsibilities for your system or its
operation.
2. All software issued by Invensys Systems, Inc. and copies of the software that you are
specifically permitted to make, are protected in accordance with Federal copyright
laws. It is illegal to make copies of any software media provided to you by
Invensys Systems, Inc. for any purpose other than those purposes mentioned in the
software license.
iii
Volume Set Information
Volume 1 of 3
ACCUM through DTIME
1. ACCUM Accumulator Block............................................................................................. 1
2. AIN Analog Input Block.................................................................................................. 25
3. AINR Redundant Analog Input Block............................................................................. 75
4. ALMPRI Alarm Priority Change Block.......................................................................... 127
5. AOUT Analog Output Block......................................................................................... 135
6. AOUTR Redundant Analog Output Block.................................................................... 173
7. BIAS Bias Block............................................................................................................. 209
8. BIN Binary Input Block................................................................................................. 237
9. BINR Redundant Binary Input Block............................................................................ 259
10. BLNALM Boolean Alarm Block .................................................................................. 285
11. BOOL Boolean Variable Block .................................................................................... 295
12. BOUT Binary Output Block ....................................................................................... 299
13. BOUTR Redundant Binary Output Block .................................................................. 325
14. CALC Calculator Block ............................................................................................... 353
15. CALCA Advanced Calculator Block............................................................................. 433
16. CHARC Characterizer Block ....................................................................................... 511
17. CIN Contact Input Block ............................................................................................ 529
18. CINR Redundant Contact Input Block ....................................................................... 553
19. CMP Compounds........................................................................................................ 575
20. COUT Contact Output Block..................................................................................... 585
21. COUTR Redundant Contact Output Block................................................................ 609
22. DEP Dependent Sequence Block ................................................................................. 633
23. DGAP Differential Gap Block ..................................................................................... 653
24. DPIDA Controller .......................................................................................................... 685
25. DSI Display Station Interface Block............................................................................. 769
26. DTIME Dead Time Compensator Block..................................................................... 779
Volume 2 of 3
ECB through MOVLV
27. Equipment Control Blocks.............................................................................................. 791
28. Primary ECB (ECBP or ECB11) .................................................................................... 797
29. ECB1 Analog Input ..................................................................................................... 805
30. ECB2 Analog Input and Analog Output...................................................................... 813
B0193AX Rev AB Volume Set Information
iv
31. ECB4 Pulse In and Analog Output .............................................................................. 823
32. ECB5 Digital In, Sustained/Momentary, and Digital Out ........................................... 831
33. ECB6 Sequence of Events Input .................................................................................. 845
34. ECB7 Digital and Pulse Count In................................................................................ 853
35. ECB8 Ladder Logic or DC Out/Validated Input ......................................................... 861
36. ECB9 Remote/Manual................................................................................................. 873
37. ECB11 (ECBP, Primary ECB)........................................................................................ 885
38. ECB12 Intelligent Transmitter 2 Interface................................................................... 893
39. ECB13 Hydrostatic Tank Gauge ................................................................................. 901
40. ECB14 Panel-Mounted Display................................................................................... 919
41. ECB15 Allen-Bradley PLC ECB.................................................................................. 927
42. ECB16 Modicon PC ECB........................................................................................... 933
43. ECB18 Intelligent Transmitter 2 (Child) ..................................................................... 941
44. ECB19 760 Micro Controller ...................................................................................... 953
45. ECB21 761 Micro Controller ...................................................................................... 959
46. ECB22 Mass Flow Transmitter.................................................................................... 965
47. ECB23 Intelligent Transmitter 2 Interface (Parent) ..................................................... 977
48. ECB34 MDACT Feedback Lag Tristate ...................................................................... 987
49. ECB36 MDACT Pulse Width Tristate ........................................................................ 999
50. ECB38R Intelligent Transmitter 2 Interface (Redundant Parent) .............................. 1011
51. ECB39 AMSPRI........................................................................................................ 1023
52. ECB41 Analog Input FBC......................................................................................... 1033
53. ECB42 Digital Input FBC......................................................................................... 1039
54. ECB43 Analog Output FBC...................................................................................... 1045
55. ECB44 Digital Output FBC...................................................................................... 1053
56. ECB46 Digital Input/Digital Output FBC................................................................ 1061
57. ECB47 FBP10 Interface to Cluster I/O..................................................................... 1069
58. ECB47R Redundant FBP10 Interface to Cluster I/O ................................................ 1079
59. ECB52 DPIDA Controller ........................................................................................ 1091
60. ECB53 Analog Output .............................................................................................. 1101
61. ECB73 Valve and Transmitter Parent ECB ............................................................... 1109
62. ECB74 Valve and Transmitter Child ECB................................................................. 1117
63. ECB110 Interface for FCM10 Family of Devices....................................................... 1135
64. ECB200 Single Module DCI FBM Interface ............................................................. 1141
65. ECB201 Device Interface........................................................................................... 1155
66. ECB202 REDUNDANT DCI FBM Interface .......................................................... 1175
67. ECB210 Redundant FCM100 Interface .................................................................... 1191
68. EVENT Event Block ................................................................................................. 1205
Volume Set Information B0193AX Rev AB
v
69. EXC Exception Sequence Block................................................................................. 1221
70. FBTUNE Feedback Tuner Block............................................................................... 1241
71. FFTUNE Feedforward Tuner Block .......................................................................... 1251
72. GDEV General Device Block..................................................................................... 1259
73. IIN Integer Input Block............................................................................................. 1291
74. IINR Redundant Integer Input Block ........................................................................ 1309
75. IND Independent Sequence Block............................................................................. 1331
76. IOUT Integer Output Block...................................................................................... 1349
77. LIM Limiter Block..................................................................................................... 1373
78. LLAG Lead Lag Block................................................................................................ 1387
79. LOGIC Logic Block................................................................................................... 1397
80. LONG Long Integer Variable Block .......................................................................... 1429
81. MAIN Multiple Analog Input Block.......................................................................... 1431
82. MATH Mathematics Block........................................................................................ 1473
83. MCIN Multiple Contact Input Block........................................................................ 1519
84. MCOUT Multiple Contact Output Block................................................................. 1543
85. MDACT Motor Driven Actuator Controller ................................................................ 1563
86. MEALM Measurement Alarm Block.......................................................................... 1607
87. MON Monitor Block ................................................................................................ 1623
88. MOVLV Motor Operated Valve Block...................................................................... 1639
Volume 3 of 3
MSG through VLV
89. MSG Message Generator Block.................................................................................. 1663
90. MTR Motor Control Block ....................................................................................... 1671
91. OUTSEL Output Select Block................................................................................... 1693
92. PACK Packed Long Integer Variable Block................................................................ 1705
93. PAKIN Packed Input Block....................................................................................... 1707
94. PAKINR Redundant Packed Input Block .................................................................. 1719
95. PAKOUT Packed Output Block................................................................................ 1735
96. PATALM Pattern Alarm Block.................................................................................. 1753
97. PATT Pattern Block .................................................................................................. 1765
98. PID Proportional Integral Derivative Block ............................................................... 1783
99. PIDA Advanced PID Block........................................................................................ 1819
100. PIDX PID Extended Block...................................................................................... 1895
101. PIDXE PID Extended with EXACT Block.............................................................. 1933
102. PIDE PID With EXACT Block............................................................................... 1977
103. PLB Programmable Logic Block............................................................................... 2019
B0193AX Rev AB Volume Set Information
vi
104. PLSOUT Pulse Output Block.................................................................................. 2037
105. PTC Proportional Time Controller Block................................................................ 2053
106. RAMP Ramp Block ................................................................................................. 2085
107. REAL Real Variable Block ....................................................................................... 2097
108. RATIO Ratio Block................................................................................................. 2101
109. REALM Real Alarm Block....................................................................................... 2133
110. RIN Real Input Block.............................................................................................. 2157
111. RINR Redundant Real Input Block ......................................................................... 2187
112. ROUT Real Output Block....................................................................................... 2223
113. ROUTR Redundant Real Output Block.................................................................. 2255
114. SIGSEL Signal Selector Block .................................................................................. 2291
115. STALM State Alarm Block ...................................................................................... 2305
116. STATE State Block.................................................................................................. 2317
117. Station Block............................................................................................................... 2349
118. STRIN String Input Block....................................................................................... 2377
119. STRING String Variable Block................................................................................ 2387
120. STROUT String Output Block ............................................................................... 2389
121. SWCH Switch Block ............................................................................................... 2397
122. TIM Timer Block .................................................................................................... 2409
123. VLV Valve Block ..................................................................................................... 2417
vii
Contents
Volume Set Information........................................................................................................ iii
Figures.................................................................................................................................. xxi
Tables.................................................................................................................................. xxv
Preface................................................................................................................................ xxix
1. ACCUM Accumulator Block.......................................................................................... 1
1.1 Overview ......................................................................................................................... 1
1.2 Basic Operation .................................................................................................................. 1
1.3 Features ............................................................................................................................... 2
1.4 Parameters ........................................................................................................................... 3
1.4.1 Parameter Definitions ................................................................................................. 4
1.5 Functions .......................................................................................................................... 15
1.5.1 Detailed Diagram ...................................................................................................... 16
1.5.2 Accumulator Process ................................................................................................. 16
1.5.2.1 Pulse Count Option .......................................................................................... 17
1.5.3 Meter Factor ............................................................................................................. 19
1.5.3.1 Meter Factor Functions ..................................................................................... 19
1.5.3.2 Meter Factor Calculation ................................................................................... 19
1.5.3.3 Meter Factor Examples ...................................................................................... 20
1.5.4 Carry ......................................................................................................................... 21
1.5.5 Block Control States .................................................................................................. 21
1.5.5.1 Measurement Error Handling for Auto to Manual Transitions .......................... 22
1.5.6 Alarming the Accumulator ........................................................................................ 23
1.5.7 Peer-to-Peer Connections of Real-Type Block Inputs ................................................ 23
1.5.8 Application Diagram ................................................................................................. 24
2. AIN Analog Input Block .............................................................................................. 25
2.1 Overview ........................................................................................................................... 25
2.2 Basic Operation ................................................................................................................ 26
2.3 Features ............................................................................................................................. 26
2.4 Parameters ......................................................................................................................... 27
2.4.1 Parameter Definitions ............................................................................................... 29
2.5 Functions .......................................................................................................................... 44
2.5.1 Detailed Diagram ...................................................................................................... 44
2.5.2 Input and Signal Conditioning .................................................................................. 45
2.5.2.1 General Analog Input: 0 to 20 mA or 0 to 10 V dc ........................................... 45
2.5.2.2 Thermocouple Input ......................................................................................... 48
2.5.2.3 RTD Input ........................................................................................................ 50
2.5.2.4 Pulse Rate Input ................................................................................................ 52
B0193AX Rev AB Contents
viii
2.5.2.5 Pulse Count Input ............................................................................................. 53
2.5.2.6 Intelligent Field Device Input ............................................................................ 53
2.5.2.7 Exceptions for Use of AIN Blocks with Intelligent Transmitters
and Positioners (Parent ECB73) .................................................................................... 55
2.5.2.8 Input from Another Block ................................................................................. 56
2.5.3 Zero and Span Scaling ............................................................................................... 57
2.5.4 Clamping .................................................................................................................. 57
2.5.5 Filtering .................................................................................................................... 58
2.5.5.1 First Order Lag Filtering (FLOP = 1) ................................................................ 59
2.5.5.2 Butterworth Filtering (FLOP = 2) ..................................................................... 60
2.5.5.3 Two-Sample-Average Filtering (FLOP = 3) ....................................................... 60
2.6 Bad Input and Out-of-Range Processing ........................................................................... 60
2.6.1 Bad Status and BAD Parameter ................................................................................. 60
2.6.2 Out-of-Range Conditions ......................................................................................... 61
2.6.2.1 Out-of-Range Due to Signal Conditioning ........................................................ 61
2.6.2.2 Out-of-Range Due to Clamping ........................................................................ 62
2.6.3 Out-of-Service Conditions ........................................................................................ 62
2.6.4 Last Good Value ....................................................................................................... 62
2.7 Manual Mode ................................................................................................................... 64
2.8 Alarming ........................................................................................................................... 65
2.9 Application Diagram ......................................................................................................... 66
2.10 Appendix A Signal Conditioning Tables ...................................................................... 67
2.10.1 Summary ................................................................................................................. 67
2.10.2 Linear/Square Root Signal Conditioning ................................................................. 68
2.10.3 Thermocouple Signal Conditioning ........................................................................ 70
2.10.4 RTD Signal Conditioning ....................................................................................... 70
2.11 Appendix B Valid Input Connections .......................................................................... 71
2.11.1 FBM201 through FBM242 Valid Input Connections ............................................. 71
2.11.2 FBM01 through FBM46 Valid Input Connections ................................................. 72
2.11.3 Cluster I/O Valid Input Connections ...................................................................... 73
3. AINR Redundant Analog Input Block.......................................................................... 75
3.1 Overview ........................................................................................................................... 75
3.2 Basic Operation ................................................................................................................ 76
3.3 Features ............................................................................................................................. 76
3.4 Parameters ......................................................................................................................... 77
3.4.1 Parameter Definitions ............................................................................................... 79
3.5 Functions .......................................................................................................................... 96
3.5.1 Detailed Diagram ...................................................................................................... 96
3.5.2 Input And Signal Conditioning ................................................................................. 97
3.5.2.1 General Analog Input: 0 to 20 mA or 0 to 10 V dc ........................................... 97
3.5.2.2 Thermocouple Input ....................................................................................... 100
3.5.2.3 RTD Input ...................................................................................................... 103
3.5.2.4 Pulse Rate Input .............................................................................................. 104
3.5.2.5 Pulse Count Input ........................................................................................... 105
3.5.2.6 Intelligent Field Device Input .......................................................................... 106
3.5.2.7 Inputs from Other Blocks ................................................................................ 107
3.5.3 Zero and Span Scaling ............................................................................................. 108
Contents B0193AX Rev AB
ix
3.5.4 Clamping ................................................................................................................ 109
3.5.5 Filtering .................................................................................................................. 110
3.5.5.1 First Order Lag Filtering (FLOP = 1) .............................................................. 110
3.5.5.2 Butterworth Filtering (FLOP = 2) ................................................................... 111
3.5.5.3 Two-Sample-Average Filtering (FLOP = 3) ..................................................... 111
3.6 Bad Input and Out-of-Range Processing ......................................................................... 112
3.6.1 Bad Status and BAD Parameter ............................................................................... 112
3.6.2 Out-of-Range Conditions ....................................................................................... 112
3.6.2.1 Out-of-Range Due to Signal Conditioning ...................................................... 112
3.6.2.2 Out-of-Range Due to Clamping ...................................................................... 113
3.6.3 Out-of-Service Conditions ...................................................................................... 113
3.6.4 Last Good Value ..................................................................................................... 113
3.7 Manual Mode ................................................................................................................. 115
3.8 Alarming ......................................................................................................................... 115
3.9 Application Diagram ....................................................................................................... 117
3.10 Appendix A Signal Conditioning Tables .................................................................... 118
3.10.1 Summary ............................................................................................................... 118
3.10.2 Linear/Square Root Signal Conditioning ............................................................... 119
3.10.3 Thermocouple Signal Conditioning ...................................................................... 121
3.10.4 RTD Signal Conditioning ..................................................................................... 121
3.11 Appendix B Valid Input Connections ........................................................................ 121
3.11.1 FBM201 through FBM242 Valid Input Connections ........................................... 121
3.11.2 FBM01 through FBM46 Valid Input Connections ............................................... 123
3.11.3 Cluster I/O Valid Input Connections .................................................................... 124
4. ALMPRI Alarm Priority Change Block...................................................................... 127
4.1 Overview ......................................................................................................................... 127
4.2 Features ........................................................................................................................... 127
4.3 Parameters ....................................................................................................................... 127
4.3.1 Parameter Definitions ............................................................................................. 128
4.4 Detailed Operation ......................................................................................................... 132
4.4.1 Detailed Diagram .................................................................................................... 132
4.4.2 Block States ............................................................................................................. 132
4.4.2.1 Initialization .................................................................................................... 132
4.4.2.2 Manual ............................................................................................................ 132
4.4.2.3 Auto ................................................................................................................ 132
4.4.3 Alarm Priority Changing ......................................................................................... 132
4.4.3.1 Example Application ....................................................................................... 133
5. AOUT Analog Output Block ..................................................................................... 135
5.1 Overview ......................................................................................................................... 135
5.2 Basic Operation .............................................................................................................. 136
5.3 Features ........................................................................................................................... 136
5.4 Parameters ....................................................................................................................... 137
5.4.1 Parameter Definitions ............................................................................................. 139
5.5 Functions ........................................................................................................................ 154
B0193AX Rev AB Contents
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5.5.1 Detailed Diagram .................................................................................................... 154
5.5.2 Block Initialization .................................................................................................. 155
5.5.3 Block Validation ...................................................................................................... 156
5.5.4 Output Processing ................................................................................................... 157
5.5.4.1 Zero and Span Scaling ..................................................................................... 158
5.5.4.2 Reset Balance Action ....................................................................................... 159
5.5.4.3 Clamping ........................................................................................................ 160
5.5.4.4 Back Calculated Outputs ................................................................................. 160
5.5.4.5 Signal Conditioning ........................................................................................ 161
5.5.4.6 Output to FBM or FBC .................................................................................. 163
5.5.4.7 Configuring the AOUT Block for Intelligent Positioners ................................ 163
5.5.5 Changing Engineering Range Limits ....................................................................... 164
5.5.6 Hold State ............................................................................................................... 165
5.5.7 PRIBLK and PRITIM Functionality ....................................................................... 165
5.5.8 Failsafe State ............................................................................................................ 165
5.5.9 Supervisory Control ................................................................................................ 166
5.6 Bad, Out-of-Service, and Error Conditions ..................................................................... 167
5.6.1 Bad Condition ........................................................................................................ 167
5.6.2 Out-of-Service Condition ........................................................................................ 168
5.6.3 Error Condition and Last Good Value Functionality .............................................. 168
5.7 Manual Mode ................................................................................................................. 169
5.8 Alarming ......................................................................................................................... 170
5.9 Application Diagram ....................................................................................................... 171
6. AOUTR Redundant Analog Output Block ................................................................ 173
6.1 Overview ......................................................................................................................... 173
6.2 Basic Operation .............................................................................................................. 174
6.3 Features ........................................................................................................................... 175
6.4 Parameters ....................................................................................................................... 176
6.4.1 Parameter Definitions ............................................................................................. 178
6.4.2 Detailed Diagram .................................................................................................... 192
6.4.3 Block Initialization .................................................................................................. 193
6.4.4 Block Validation ...................................................................................................... 194
6.4.5 Output Processing ................................................................................................... 195
6.4.5.1 Zero and Span Scaling ..................................................................................... 196
6.4.5.2 Reset Balance Action ....................................................................................... 197
6.4.5.3 Clamping ........................................................................................................ 198
6.4.5.4 Back Calculated Outputs ................................................................................. 198
6.4.5.5 Signal Conditioning ........................................................................................ 199
6.4.5.6 Output to FBMs or FBCs ................................................................................ 201
6.4.6 Changing Engineering Range Limits ....................................................................... 201
6.4.7 Hold State ............................................................................................................... 201
6.4.8 PRIBLK and PRITIM Functionality ....................................................................... 202
6.4.9 Failsafe State ............................................................................................................ 202
6.4.10 Supervisory Control .............................................................................................. 202
6.5 Bad, Out-of-Service, and Error Conditions ..................................................................... 204
6.5.1 Bad Condition ........................................................................................................ 204
6.5.2 Out-of-Service Condition ........................................................................................ 205
Contents B0193AX Rev AB
xi
6.5.3 Error Condition and Last Good Value Functionality .............................................. 205
6.6 Manual Mode ................................................................................................................. 206
6.7 Alarming ......................................................................................................................... 207
6.8 Application Diagram ....................................................................................................... 208
7. BIAS Bias Block ......................................................................................................... 209
7.1 Overview ......................................................................................................................... 209
7.1.1 I/O Diagram ........................................................................................................... 209
7.2 Features ........................................................................................................................... 210
7.3 Parameters ....................................................................................................................... 211
7.3.1 Parameter Definitions ............................................................................................. 214
7.4 Functions ........................................................................................................................ 232
7.4.1 Detailed Operation ................................................................................................. 232
7.4.1.1 Normal Configuration ..................................................................................... 234
7.4.2 PRIBLK and PRITIM Functionality ....................................................................... 236
8. BIN Binary Input Block............................................................................................. 237
8.1 Overview ......................................................................................................................... 237
8.2 Basic Operation .............................................................................................................. 237
8.3 Features ........................................................................................................................... 238
8.4 Parameters ....................................................................................................................... 238
8.4.1 Parameter Definitions ............................................................................................. 240
8.5 Functions ........................................................................................................................ 252
8.5.1 Detailed Diagram .................................................................................................... 252
8.5.2 Associated ECBs ...................................................................................................... 252
8.5.3 DCI Connection ..................................................................................................... 253
8.5.4 Origin of Input Data ............................................................................................... 253
8.5.5 Processing of Input Point Status .............................................................................. 254
8.5.6 Processing of Input Point Data ................................................................................ 254
8.5.7 Auto/Manual Arbitration ........................................................................................ 254
8.5.8 Operation in Auto Mode ......................................................................................... 255
8.5.9 Operation in Manual Mode .................................................................................... 255
8.5.10 State Change Messages (CP270 Only) .................................................................. 255
8.5.11 Alarming (CP270 Only) ........................................................................................ 256
8.5.11.1 BAD I/O Alarms ........................................................................................... 256
8.5.11.2 State Alarms .................................................................................................. 257
8.5.11.3 Alarm Management ....................................................................................... 257
8.5.12 Time Stamp .......................................................................................................... 257
9. BINR Redundant Binary Input Block ........................................................................ 259
9.1 Overview ......................................................................................................................... 259
9.2 Basic Operation .............................................................................................................. 259
9.3 Features ........................................................................................................................... 260
9.4 Parameters ....................................................................................................................... 260
9.4.1 Parameter Definitions ............................................................................................. 262
B0193AX Rev AB Contents
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9.5 Functions ........................................................................................................................ 276
9.5.1 Detailed Diagram .................................................................................................... 276
9.5.2 Associated ECBs ...................................................................................................... 276
9.5.3 DCI Connections .................................................................................................... 277
9.5.4 Origins of Input Data .............................................................................................. 277
9.5.5 Processing the Status and Data of the Input Points ................................................. 278
9.5.6 Arbitration Algorithm ............................................................................................. 279
9.5.7 Auto/Manual Arbitration ........................................................................................ 280
9.5.8 Operation in Auto Mode ......................................................................................... 280
9.5.9 Operation in Manual Mode .................................................................................... 280
9.5.10 State Change Messages (CP270 Only) .................................................................. 280
9.5.11 Alarming (CP270 Only) ........................................................................................ 281
9.5.11.1 BAD I/O Alarms ........................................................................................... 281
9.5.11.2 State Alarms .................................................................................................. 282
9.5.11.3 Alarm Management ....................................................................................... 282
9.5.12 Time Stamp .......................................................................................................... 283
10. BLNALM Boolean Alarm Block............................................................................... 285
10.1 Overview ....................................................................................................................... 285
10.1.1 I/O Diagram ......................................................................................................... 285
10.2 Features ......................................................................................................................... 285
10.3 Parameters ..................................................................................................................... 286
10.3.1 Parameter Definitions ........................................................................................... 286
10.4 Functions ...................................................................................................................... 293
10.4.1 Detailed Operation ............................................................................................... 293
11. BOOL Boolean Variable Block................................................................................. 295
11.1 Overview ....................................................................................................................... 295
11.2 Basic Operation ............................................................................................................ 295
11.3 Features ......................................................................................................................... 296
11.4 Parameters ..................................................................................................................... 296
11.4.1 Parameter Definitions ........................................................................................... 296
12. BOUT Binary Output Block.................................................................................... 299
12.1 Overview ....................................................................................................................... 299
12.2 Basic Operation ............................................................................................................ 300
12.3 Features ......................................................................................................................... 301
12.4 Parameters ..................................................................................................................... 302
12.4.1 Parameter Definitions ........................................................................................... 303
12.5 Functions ...................................................................................................................... 315
12.5.1 Detailed Diagram .................................................................................................. 315
12.5.2 Associated ECBs .................................................................................................... 315
12.5.3 DCI Connections .................................................................................................. 316
12.5.4 Output Point and Initialization Input Point .......................................................... 316
12.5.5 Confirmed Output Parameters .............................................................................. 317
12.5.6 Status of the Readback Value ................................................................................ 317
Contents B0193AX Rev AB
xiii
12.5.7 Auto/Manual Switching ........................................................................................ 318
12.5.8 Fail-Safe Functions ................................................................................................ 318
12.5.9 Time Stamp .......................................................................................................... 319
12.5.10 Conditions for Sending a Block Output .............................................................. 320
12.5.11 Sending the Output ............................................................................................ 320
12.5.12 Status of Other Block Outputs ............................................................................ 320
12.5.13 PRIBLK and PRITIM Functionality ................................................................... 320
12.5.14 Change Timer ..................................................................................................... 321
12.5.15 Status of INI_PT ................................................................................................. 321
12.5.16 Initialization ........................................................................................................ 321
12.5.17 Cascade Processing .............................................................................................. 321
12.5.18 Holding and Tracking ......................................................................................... 322
12.5.19 Alarming (CP270 Only) ...................................................................................... 322
13. BOUTR Redundant Binary Output Block............................................................... 325
13.1 Overview ....................................................................................................................... 325
13.2 Basic Operation ............................................................................................................ 325
13.3 Features ......................................................................................................................... 327
13.4 Parameters ..................................................................................................................... 328
13.4.1 Parameter Definitions ........................................................................................... 329
13.5 Functions ...................................................................................................................... 342
13.5.1 Detailed Diagram .................................................................................................. 342
13.5.2 Associated ECBs .................................................................................................... 342
13.5.3 DCI Connections .................................................................................................. 343
13.5.4 Output Point and Initialization Input Point .......................................................... 343
13.5.5 Confirmed Output Parameters .............................................................................. 344
13.5.6 Status of the Readback Values ............................................................................... 345
13.5.7 Arbitration Algorithm ........................................................................................... 345
13.5.8 Auto/Manual Switching ........................................................................................ 346
13.5.9 Fail-Safe Functions ................................................................................................ 347
13.5.10 Time Stamp ........................................................................................................ 347
13.5.11 Conditions for Sending a Block Output .............................................................. 347
13.5.12 Sending the Output ............................................................................................ 348
13.5.13 Status of Other Block Outputs ............................................................................ 348
13.5.14 PRIBLK and PRITIM Functionality ................................................................... 348
13.5.15 Change Timer ..................................................................................................... 348
13.5.16 Status of INI_PT ................................................................................................. 349
13.5.17 Initialization ........................................................................................................ 349
13.5.18 Cascade Processing .............................................................................................. 349
13.5.19 Holding and Tracking ......................................................................................... 350
13.5.20 Simulation Option .............................................................................................. 350
13.5.21 Alarming (CP270 Only) ...................................................................................... 350
13.5.21.1 Bad Alarming Overview ............................................................................... 351
13.5.21.2 Inhibiting and Disabling Alarms .................................................................. 351
14. CALC Calculator Block............................................................................................ 353
14.1 Overview ....................................................................................................................... 353
14.2 Basic Operation ............................................................................................................ 354
B0193AX Rev AB Contents
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14.3 Features ......................................................................................................................... 354
14.4 Parameters ..................................................................................................................... 355
14.4.1 Parameter Definitions ........................................................................................... 356
14.5 Functions ...................................................................................................................... 362
14.5.1 Arithmetic Instructions ......................................................................................... 364
14.5.2 Boolean Instructions .............................................................................................. 365
14.5.3 Input/Output Reference Instructions .................................................................... 366
14.5.4 Cascade and Propagation Instructions ................................................................... 367
14.5.5 Memory and Stack Reference Instructions ............................................................. 367
14.5.6 Program Control Instructions ............................................................................... 368
14.5.7 Clear/Set Instructions ............................................................................................ 369
14.5.8 Timing Functions ................................................................................................. 369
14.5.9 Logic Functions ..................................................................................................... 370
14.5.10 Error Control Instructions ................................................................................... 371
14.6 Instructions ................................................................................................................... 371
14.6.1 Instruction Processing ........................................................................................... 371
14.6.1.1 Auto Mode .................................................................................................... 371
14.6.1.2 Manual Mode ................................................................................................ 371
14.6.2 Instruction Syntax ................................................................................................. 372
14.6.2.1 Rules ............................................................................................................. 372
14.6.2.2 Constants ...................................................................................................... 373
14.6.3 Instruction Operation ........................................................................................... 373
14.6.3.1 Stack Operation ............................................................................................. 374
14.6.4 Instruction Definition Convention ........................................................................ 376
14.6.5 Instruction Definitions .......................................................................................... 377
14.7 Error Conditions ........................................................................................................... 425
14.8 Programming Concepts ................................................................................................. 426
14.8.1 Execution Sequence ............................................................................................... 427
14.8.2 Arithmetic Chaining ............................................................................................. 428
14.8.2.1 Stack Push Operation .................................................................................... 428
14.8.2.2 Stack Pop Operation ..................................................................................... 428
14.9 Application Example ..................................................................................................... 432
15. CALCA Advanced Calculator Block ......................................................................... 433
15.1 Overview ....................................................................................................................... 433
15.2 Basic Operation ............................................................................................................ 434
15.3 Features ......................................................................................................................... 435
15.4 Parameters ..................................................................................................................... 435
15.4.1 Parameter Definitions ........................................................................................... 436
15.5 Functions ...................................................................................................................... 441
15.5.1 Arithmetic Instructions ......................................................................................... 441
15.5.2 Boolean Instructions .............................................................................................. 443
15.5.3 Input/Output Reference Instructions .................................................................... 443
15.5.4 Cascade and Propagation Instructions ................................................................... 444
15.5.5 Memory and Stack Reference Instructions ............................................................. 445
15.5.6 Program Control Instructions ............................................................................... 445
15.5.7 Clear/Set Instructions ............................................................................................ 446
15.5.8 Timing Instructions .............................................................................................. 446
Contents B0193AX Rev AB
xv
15.5.9 Logic Instructions .................................................................................................. 446
15.5.10 Error Control Instructions ................................................................................... 447
15.6 Instructions ................................................................................................................... 447
15.6.1 Instruction Processing ........................................................................................... 447
15.6.1.1 Auto Mode .................................................................................................... 447
15.6.1.2 Manual Mode ................................................................................................ 447
15.6.2 Instruction Syntax ................................................................................................. 448
15.6.2.1 Rules ............................................................................................................. 448
15.6.2.2 Constants ...................................................................................................... 449
15.6.3 Instruction Operation ........................................................................................... 449
15.6.3.1 Stack Operation ............................................................................................. 450
15.6.4 Instruction Definition Convention ........................................................................ 452
15.6.5 Instruction Definitions .......................................................................................... 453
15.7 Error Conditions ........................................................................................................... 504
15.8 Programming Concepts ................................................................................................. 505
15.8.1 Execution Sequence ............................................................................................... 506
15.8.2 Arithmetic Chaining ............................................................................................. 507
15.8.2.1 Stack Push Operations ................................................................................... 507
15.8.2.2 Stack Pop Operations .................................................................................... 507
15.9 Application Example ..................................................................................................... 509
16. CHARC Characterizer Block.................................................................................... 511
16.1 Overview ....................................................................................................................... 511
16.1.1 I/O Diagram ......................................................................................................... 511
16.2 Features ......................................................................................................................... 511
16.3 Parameters ..................................................................................................................... 512
16.3.1 Parameter Definitions ........................................................................................... 513
16.4 Detailed Operation ....................................................................................................... 526
16.4.1 PRIBLK and PRITIM Functionality ..................................................................... 528
17. CIN Contact Input Block......................................................................................... 529
17.1 Overview ....................................................................................................................... 529
17.2 Basic Operation ............................................................................................................ 529
17.3 Features ......................................................................................................................... 530
17.4 Parameters ..................................................................................................................... 530
17.4.1 Parameter Definitions ........................................................................................... 531
17.4.2 Detailed Diagram .................................................................................................. 542
17.4.3 Input from FBM or FBC ....................................................................................... 543
17.4.4 Input from Another Block ..................................................................................... 545
17.5 Bad Input, Out-of-Service and Error Conditions .......................................................... 545
17.5.1 Bad Input Condition ............................................................................................. 545
17.5.2 Out-of-Service Condition ...................................................................................... 546
17.5.3 Error Condition .................................................................................................... 546
17.6 Manual Mode ............................................................................................................... 546
17.7 Messages and Alarming ................................................................................................. 546
17.7.1 State Change Messages .......................................................................................... 547
B0193AX Rev AB Contents
xvi
17.7.2 Alarming ............................................................................................................... 547
17.8 Application Diagram ..................................................................................................... 548
17.9 Appendix A Valid Input Connections ........................................................................ 548
17.9.1 Fieldbus Modules Valid Input Connections .......................................................... 548
17.9.2 Cluster I/O Valid Input Connections .................................................................... 550
18. CINR Redundant Contact Input Block.................................................................... 553
18.1 Overview ....................................................................................................................... 553
18.2 Basic Operation ............................................................................................................ 554
18.3 Features ......................................................................................................................... 554
18.4 Parameters ..................................................................................................................... 555
18.4.1 Parameter Definitions ........................................................................................... 556
18.5 Functions ...................................................................................................................... 568
18.5.1 Detailed Diagram .................................................................................................. 568
18.5.2 Input from FBM ................................................................................................... 569
18.5.3 Input from Another Block ..................................................................................... 569
18.6 Bad Input and Out-of-Service Conditions .................................................................... 569
18.6.1 Bad Input Condition ............................................................................................. 569
18.6.2 Out-of-Service Condition ...................................................................................... 570
18.7 Manual Mode ............................................................................................................... 570
18.8 Messages and Alarming ................................................................................................. 570
18.8.1 State Change Messages .......................................................................................... 570
18.8.2 Alarming ............................................................................................................... 571
18.8.2.1 State Alarming Overview ............................................................................... 572
18.8.2.2 Bad Alarming Overview ................................................................................. 572
18.9 Application Diagram ..................................................................................................... 573
19. CMP Compounds .................................................................................................... 575
19.1 Compound Overview .................................................................................................... 575
19.2 Compound I/O Diagram .............................................................................................. 576
19.3 Compound Features ...................................................................................................... 576
19.4 Compound Rules .......................................................................................................... 576
19.5 Compound Functions ................................................................................................... 576
19.5.1 Compound/Block Process Alarming ...................................................................... 576
19.5.2 Compound/Block Phasing .................................................................................... 577
19.5.3 Compound Attributes ........................................................................................... 577
19.5.4 Compound Access ................................................................................................. 577
19.5.5 Compound/Block Parameters ................................................................................ 577
19.5.5.1 Configurable Parameters ................................................................................ 578
19.5.5.2 Connectable Parameters ................................................................................ 578
19.5.5.3 Input Parameters ........................................................................................... 578
19.5.5.4 Output Parameters ........................................................................................ 579
19.5.5.5 Nonconnectable Parameters .......................................................................... 579
19.5.5.6 Compound Operation Information and Procedures ...................................... 579
19.6 Compound Parameters .................................................................................................. 580
Contents B0193AX Rev AB
xvii
20. COUT Contact Output Block.................................................................................. 585
20.1 Overview ....................................................................................................................... 585
20.2 Basic Operation ............................................................................................................ 586
20.3 Features ......................................................................................................................... 586
20.4 Parameters ..................................................................................................................... 587
20.4.1 Parameter Definitions ........................................................................................... 588
20.5 Functions ...................................................................................................................... 597
20.5.1 Detailed Diagram .................................................................................................. 597
20.5.2 Output Processing ................................................................................................. 598
20.5.3 Bumpless Operation Features ................................................................................ 600
20.6 Bad Input, Out-of-Service, and Error Conditions ......................................................... 601
20.6.1 Bad Input Conditions ........................................................................................... 601
20.6.2 Out-of-Service Condition ...................................................................................... 601
20.6.3 Error Condition and Last Good Value Functionality ............................................ 601
20.7 Failsafe State ................................................................................................................. 602
20.8 Manual Mode ............................................................................................................... 602
20.9 Alarming ....................................................................................................................... 603
20.10 Application Diagram ................................................................................................... 604
20.11 Appendix A Valid Output Connections ................................................................... 605
21. COUTR Redundant Contact Output Block............................................................. 609
21.1 Overview ....................................................................................................................... 609
21.2 Basic Operation ............................................................................................................ 610
21.3 Features ......................................................................................................................... 611
21.4 Parameters ..................................................................................................................... 612
21.4.1 Parameter Definitions ........................................................................................... 613
21.5 Functions ...................................................................................................................... 623
21.5.1 Detailed Diagram .................................................................................................. 623
21.5.2 Output Processing ................................................................................................. 624
21.5.2.1 Duplicate Output Channel Detection ........................................................... 624
21.5.2.2 Pulsed Output ............................................................................................... 625
21.5.3 Output Initialization ............................................................................................. 625
21.5.4 Cascade Initialization ............................................................................................ 625
21.5.5 Simulation Mode .................................................................................................. 626
21.6 Bad Input, Out-of-Service, and Error Conditions ......................................................... 626
21.6.1 Bad Input Conditions ........................................................................................... 626
21.6.2 Out-of-Service Condition ...................................................................................... 626
21.6.3 Error Condition and Last Good Value Functionality ............................................ 626
21.7 Failsafe State ................................................................................................................. 627
21.8 Block Modes ................................................................................................................. 627
21.8.1 Auto Mode ............................................................................................................ 627
21.8.2 Auto Hold Mode ................................................................................................... 628
21.8.3 Manual Mode ....................................................................................................... 628
21.9 Alarming ....................................................................................................................... 629
B0193AX Rev AB Contents
xviii
21.9.1 Bad Alarming Overview ........................................................................................ 629
21.9.2 Inhibiting and Disabling Alarms ........................................................................... 630
21.10 Application Diagram ................................................................................................... 631
22. DEP Dependent Sequence Block.............................................................................. 633
22.1 Overview ....................................................................................................................... 633
22.1.1 I/O Diagram ......................................................................................................... 633
22.2 Features ......................................................................................................................... 633
22.3 Parameters ..................................................................................................................... 635
22.3.1 Parameter Definitions ........................................................................................... 636
22.4 Detailed Operation ....................................................................................................... 648
23. DGAP Differential Gap Block.................................................................................. 653
23.1 Overview ....................................................................................................................... 653
23.2 Features ......................................................................................................................... 654
23.3 Parameters ..................................................................................................................... 655
23.3.1 Parameter Definitions ........................................................................................... 657
23.4 Detailed Operation ....................................................................................................... 674
23.4.1 Detailed Diagram .................................................................................................. 674
23.4.1.1 BiState Mode ................................................................................................. 676
23.4.1.2 Tristate Mode ................................................................................................ 676
23.4.2 Setpoint Control Mode ......................................................................................... 677
23.4.3 Setpoint Tracking .................................................................................................. 678
23.4.4 Auto Control Mode .............................................................................................. 678
23.4.5 Hold Mode ........................................................................................................... 678
23.4.6 Manual Mode ....................................................................................................... 679
23.4.7 Alarming ............................................................................................................... 679
23.4.7.1 Inhibit Alarming ............................................................................................ 679
23.4.7.2 Absolute Alarming ......................................................................................... 680
23.4.7.2.1 High-High Absolute Alarming............................................................... 680
23.4.7.2.2 Low-Low Absolute Alarming ................................................................. 680
23.4.7.2.3 High Absolute Alarming........................................................................ 680
23.4.7.2.4 Low Absolute Alarming ......................................................................... 680
23.4.7.3 Deviation Alarming ....................................................................................... 681
23.4.7.3.1 High Deviation Alarming ...................................................................... 681
23.4.7.3.2 Low Deviation Alarming ....................................................................... 682
23.4.8 GAP and GAPDB Parameter Validation ............................................................... 682
23.4.9 Normal Configuration .......................................................................................... 682
23.4.10 Application .......................................................................................................... 682
24. DPIDA Controller ...................................................................................................... 685
24.1 Overview ....................................................................................................................... 685
24.2 Basic Operation ............................................................................................................ 686
24.2.1 ECB52 Related Functions ..................................................................................... 686
24.3 Features ......................................................................................................................... 687
24.3.1 DPIDA Features .................................................................................................... 687
24.3.1.1 Control Modes .............................................................................................. 687
Contents B0193AX Rev AB
xix
24.3.1.2 Standard DPIDA Features ............................................................................. 687
24.3.1.3 Standard DPIDA Options ............................................................................. 688
24.3.1.4 Extended DPIDA Options ............................................................................ 689
24.3.1.5 ECB52 Features ............................................................................................. 690
24.4 Parameters ..................................................................................................................... 690
24.4.1 Parameter Definitions ........................................................................................... 694
24.5 ECB52 Parameters ........................................................................................................ 721
24.5.1 ECB52 Parameter Definitions ............................................................................... 722
24.6 Functions ...................................................................................................................... 730
24.6.1 Detailed Functional Diagram ................................................................................ 730
24.6.2 DPIDA Detailed Operation .................................................................................. 730
24.6.2.1 Control Modes .............................................................................................. 734
24.6.2.2 Manual State ................................................................................................. 737
24.6.2.3 Auto State ...................................................................................................... 738
24.6.2.4 Manual/Auto Overrides ................................................................................. 738
24.6.2.5 Holding State ................................................................................................ 739
24.6.2.6 PRIBLK and PRITIM Functionality ............................................................. 739
24.6.2.7 Output Tracking State .................................................................................. 739
24.6.2.8 Bumpless Start-up and Transfers ................................................................... 739
24.6.2.9 Cascade Handling ......................................................................................... 739
24.6.2.10 Output Limiting .......................................................................................... 741
24.6.2.11 FBM I/O Variable Scaling ........................................................................... 742
24.6.2.12 Measurement Filtering ................................................................................. 742
24.6.2.13 Setpoint Processing ...................................................................................... 744
24.6.2.13.1 Supervisory Setpoint......................................................................... 744
24.6.2.13.2 Local/Remote Overrides ................................................................... 745
24.6.2.13.3 Setpoint State ................................................................................... 745
24.6.2.13.4 Local/Remote Setpoint Selection ...................................................... 745
24.6.2.13.5 Setpoint Limiting ............................................................................. 746
24.6.2.13.6 Setpoint Gain Compensation............................................................ 747
24.6.2.13.7 Setpoint Ramping............................................................................. 747
24.6.2.13.8 Error Propagation............................................................................. 748
24.6.2.14 Nonlinear Gain ........................................................................................... 748
24.6.2.15 Feedforward ................................................................................................ 750
24.6.2.16 Error Detection ........................................................................................... 750
24.6.2.17 Alarms ......................................................................................................... 751
24.6.2.18 Validation Checks ....................................................................................... 753
24.6.2.19 Block Initialization ...................................................................................... 754
24.6.2.20 Exception Processing ................................................................................... 754
24.6.3 ECB52 Detailed Operation ................................................................................... 755
24.6.3.1 Controller Cycle Time and Measurement Sampling ...................................... 755
24.6.3.2 Measurement Processing ................................................................................ 756
24.6.3.3 FBM Analog Output Scaling ......................................................................... 759
24.6.3.4 Failsafe Action ............................................................................................... 759
24.6.3.5 FBM04/FBM204 I/O Channels .................................................................... 760
24.6.3.6 FBM17/FBM227 I/O Channels and Operators Panel .................................. 760
24.6.3.7 FBM22 I/O Channels and Auto/Manual Station .......................................... 763
24.7 Application Example ..................................................................................................... 763
24.7.1 DPIDA Block Parameter Configuration ................................................................ 766
24.7.2 ECB52 Block Parameter Configuration ................................................................. 766
B0193AX Rev AB Contents
xx
25. DSI Display Station Interface Block......................................................................... 769
25.1 Overview ....................................................................................................................... 769
25.1.1 I/O Diagram ......................................................................................................... 769
25.2 Parameters ..................................................................................................................... 769
25.2.1 Parameter Definitions ........................................................................................... 770
25.3 Detailed Operation ....................................................................................................... 776
26. DTIME Dead Time Compensator Block ................................................................. 779
26.1 Overview ....................................................................................................................... 779
26.1.1 I/O Diagram ......................................................................................................... 779
26.2 Features ......................................................................................................................... 779
26.3 Parameters ..................................................................................................................... 780
26.3.1 Parameter Definitions ........................................................................................... 781
26.4 Detailed Operation ....................................................................................................... 787
26.4.1 Algorithm Description .......................................................................................... 788
xxi
Figures
1-1. ACCUM Block Diagram .............................................................................................. 1
1-2. ACCUM Block Operational Diagram ......................................................................... 16
1-3. ACCUM Block Algorithm .......................................................................................... 16
1-4. ACCUM Pulse Rate per Block Period ......................................................................... 17
1-5. ACCUM Pulse Count per Block Period ...................................................................... 17
1-6. ACCUM Pulse Rate per Minute ................................................................................. 18
1-7. ACCUM Pulse Count per Minute .............................................................................. 18
1-8. ACCUM CARRY Function ........................................................................................ 21
1-9. ACCUM SET, CLEAR, and HOLD Functionality .................................................... 22
1-10. ACCUM Block Alarming ........................................................................................... 23
1-11. Typical ACCUM Block Application ........................................................................... 24
2-1. AIN Block Diagram .................................................................................................... 25
2-2. AIN Block Operational Diagram ................................................................................ 44
2-3. General Analog Input Example ................................................................................... 45
2-4. Thermocouple Input Example .................................................................................... 48
2-5. RTD Input Example ................................................................................................... 50
2-6. Pulse Rate Input Example ........................................................................................... 52
2-7. Intelligent Field Device Input Example ....................................................................... 53
2-8. Typical Configuration for Intelligent Transmitters with Window ECB ...................... 55
2-9. Clamping .................................................................................................................... 58
2-10. First-Order Lag Filtering ............................................................................................. 59
2-11. Butterworth Filtering .................................................................................................. 60
2-12. Last Good Value ......................................................................................................... 64
2-13. Typical AIN Block Application ................................................................................... 66
3-1. AINR Block Diagram ................................................................................................. 75
3-2. AINR Block Operational Diagram .............................................................................. 96
3-3. General Analog Input Example ................................................................................... 97
3-4. Thermocouple Input Example .................................................................................. 100
3-5. RTD Input Example ................................................................................................. 103
3-6. Pulse Rate Input Example ......................................................................................... 104
3-7. Intelligent Field Device Input Example ..................................................................... 106
3-8. Clamping .................................................................................................................. 109
3-9. First-Order Lag Filtering ........................................................................................... 111
3-10. Butterworth Filtering ................................................................................................ 111
3-11. Last Good Value ....................................................................................................... 115
3-12. Typical AINR Block Application .............................................................................. 117
4-1. ALMPRI Block I/O Diagram .................................................................................... 127
4-2. ALMPRI, Detailed Block Diagram ........................................................................... 132
4-3. Example ALMPRI Block Connections ...................................................................... 133
5-1. AOUT Block Diagram .............................................................................................. 135
5-2. AOUT Block Operational Diagram .......................................................................... 154
5-3. Reset Balance Action ................................................................................................. 159
5-4. Typical Configuration for Intelligent Transmitters with Window ECB .................... 164
5-5. Typical AOUT Block Application ............................................................................. 171
B0193AX Rev AB Figures
xxii
6-1. AOUTR Block Diagram ........................................................................................... 174
6-2. AOUTR Block Operational Diagram ....................................................................... 192
6-3. Reset Balance Action ................................................................................................. 197
6-4. Typical AOUTR Block Application .......................................................................... 208
7-1. BIAS Block I/O Diagram .......................................................................................... 209
7-2. Configuration for no Downstream Control Blocks ................................................... 235
7-3. Configuration for AOUT Downstream Block ........................................................... 235
7-4. Configuration for DGAP or PTC Secondary block ................................................... 236
7-5. Cascade Configuration .............................................................................................. 236
8-1. BIN Block Diagram .................................................................................................. 237
8-2. BIN Block Operational Diagram .............................................................................. 252
9-1. BINR Block Diagram ............................................................................................... 259
9-2. BINR Block Operational Diagram ............................................................................ 276
10-1. BLNALM Block I/O Diagram .................................................................................. 285
11-1. BOOL Block Functional Diagram ............................................................................ 295
12-1. BOUT Block Diagram .............................................................................................. 299
12-2. BOUT Block Operational Diagram .......................................................................... 315
13-1. BOUTR Block Diagram ........................................................................................... 326
13-2. BOUTR Block Operational Diagram ........................................................................ 342
14-1. CALC Block I/O Diagram ........................................................................................ 353
14-2. OSP, DON, DOFF Timing Diagram ....................................................................... 370
14-3. Manual Mode ........................................................................................................... 372
14-4. Examples of Stack Operation for Diadic Instructions ................................................ 374
14-5. Example of Stack Operation for Polyadic Instruction ................................................ 375
14-6. Timing Diagram for DOFF Example ........................................................................ 388
14-7. Timing Diagram for DON Example ......................................................................... 389
14-8. Timing Diagram for OSP Example ........................................................................... 411
14-9. Arithmetic Chaining Example, Operation Sequence ................................................. 429
14-10. Arithmetic Chaining, Stack Operation ...................................................................... 431
14-11. Application Example ................................................................................................. 432
15-1. CALCA Block I/O Diagram ..................................................................................... 433
15-2. Manual Mode ........................................................................................................... 448
15-3. Examples of Stack Operation for Diadic Instructions ................................................ 450
15-4. Example of Stack Operation for Polyadic Instruction ................................................ 451
15-5. Timing Diagram for DOFF Example ........................................................................ 466
15-6. Timing Diagram for DON Example ......................................................................... 467
15-7. Timing Diagram for OSP Example ........................................................................... 490
15-8. Program Branching Example ..................................................................................... 507
15-9. Arithmetic Chaining Example, Operation Sequence ................................................. 508
15-10. Arithmetic Chaining Example, Stack Operation ....................................................... 509
15-11. Application Example ................................................................................................. 509
16-1. CHARC Block I/O Diagram .................................................................................... 511
16-2. Functional Diagram, Characterizer Block .................................................................. 527
17-1. CIN Block Diagram .................................................................................................. 529
17-2. CIN Block Operational Diagram .............................................................................. 542
17-3. Typical CIN Block Application ................................................................................. 548
18-1. CINR Block Diagram ............................................................................................... 553
18-2. CINR Block Operational Diagram ........................................................................... 568
Figures B0193AX Rev AB
xxiii
18-3. Typical CINR Block Application .............................................................................. 573
19-1. Compound/Block Relationship ................................................................................. 575
19-2. Compound Inputs/Outputs ...................................................................................... 576
19-3. Compound Detail Display ........................................................................................ 580
20-1. COUT Block Diagram ............................................................................................. 585
20-2. COUT Block Operational Diagram .......................................................................... 597
21-1. COUTR Block Diagram ........................................................................................... 610
21-2. COUTR Block Operational Diagram ....................................................................... 623
22-1. DEP Block I/O Diagram .......................................................................................... 633
23-1. DGAP Block I/O Diagram ....................................................................................... 653
23-2. DGAP Tristate and Bistate Typical Operation .......................................................... 653
23-3. DGAP, Detailed Block Diagram ............................................................................... 675
23-4. DGAP Bistate Controller Mode ................................................................................ 676
23-5. DGAP Tristate Controller Mode .............................................................................. 677
23-6. Absolute Alarming .................................................................................................... 680
23-7. Deviation Alarming ................................................................................................... 681
23-8. Typical Cascade Configuration ................................................................................. 682
23-9. DGAP with Position Feedback ................................................................................. 683
24-1. DPIDA Controller Functional Diagram .................................................................... 685
24-2. PIDA Controller Detailed Functional Diagram ........................................................ 732
24-3. Cascade Configuration (Typical) ............................................................................... 740
24-4. Output Limiting ....................................................................................................... 741
24-5. Butterworth Measurement Filter Response ................................................................ 743
24-6. Supervisory Setpoint Control Cascade Configuration (Typical) ................................ 745
24-7. Setpoint Lead/Lag Compensation ............................................................................. 747
24-8. Nonlinear Gain Response .......................................................................................... 749
24-9. Measurement Sampling ............................................................................................. 756
24-10. FBM17/FBM227 (DPIDA) Local Operators Panel Configuration .......................... 761
24-11. Application Diagram ................................................................................................. 764
24-12. Surge Line and Control Line Curves ......................................................................... 765
25-1. DSI Block I/O Diagram ............................................................................................ 769
25-2. System with Display Station Capability ..................................................................... 776
25-3. DP10, CP30, CP40, or CP40B ................................................................................. 777
26-1. DTIME Block I/O Diagram ..................................................................................... 779
26-2. DTIME Signal Flow Diagram ................................................................................... 788
B0193AX Rev AB Figures
xxiv
xxv
Tables
1-1. ACCUM Block Parameters ........................................................................................... 3
1-2. Units of OUT and MEAS Are the Same ..................................................................... 20
1-3. Units of OUT and MEAS Are not the Same ............................................................... 20
2-1. AIN Block Parameters ................................................................................................. 27
2-2. Alarm Nomenclature ................................................................................................... 65
3-1. AINR Block Parameters .............................................................................................. 77
3-2. Alarm Nomenclature ................................................................................................. 116
4-1. ALMPRI Block Parameters ....................................................................................... 127
5-1. AOUT Block Parameters .......................................................................................... 137
5-2. AOUT Block Destinations ........................................................................................ 157
5-3. AOUT Block Alarm Nomenclature .......................................................................... 170
6-1. AOUTR Block Parameters ........................................................................................ 176
6-2. AOUTR Block Destinations ..................................................................................... 195
6-3. AOUT Block Alarm Nomenclature .......................................................................... 207
7-1. BIAS Block Parameters ............................................................................................. 211
8-1. BIN Block Parameters ............................................................................................... 238
8-2. ALMOPT Parameter Format .................................................................................... 240
8-3. ALMSTA Parameter Format ..................................................................................... 241
8-4. INHSTA Parameter Format ...................................................................................... 245
8-5. BIN Block Alarm Parameters .................................................................................... 256
9-1. BINR Block Parameters ............................................................................................ 260
9-2. ALMOPT Parameter Format .................................................................................... 262
9-3. ALMSTA Parameter Format ..................................................................................... 263
9-4. INHSTA Parameter Format ...................................................................................... 269
9-5. AI Block Alarm Parameters ....................................................................................... 281
10-1. BLNALM Block Parameters ...................................................................................... 286
10-2. INHALM Values ...................................................................................................... 293
11-1. BOOL Block Parameters ........................................................................................... 296
12-1. BOUT Block Parameters .......................................................................................... 302
12-2. ALMOPT Parameter Format .................................................................................... 303
12-3. ALMSTA Parameter Format ..................................................................................... 304
12-4. INHSTA Parameter Format ...................................................................................... 309
13-1. BOUTR Block Parameters ........................................................................................ 328
13-2. ALMOPT Parameter Format .................................................................................... 330
13-3. ALMSTA Parameter Format ..................................................................................... 330
13-4. INHSTA Parameter Format ...................................................................................... 336
13-5. Alarm Nomenclature ................................................................................................. 350
14-1. Block Comparison .................................................................................................... 353
14-2. CALC Block Parameters ........................................................................................... 355
14-3. Arithmetic Instructions ............................................................................................. 364
14-4. Boolean Instructions ................................................................................................. 365
14-5. Input/Output Reference Instructions ........................................................................ 366
14-6. Cascade and Propagation Instructions ....................................................................... 367
14-7. Memory and Stack Reference Instructions ................................................................ 368
B0193AX Rev AB Tables
xxvi
14-8. Program Control Instructions ................................................................................... 368
14-9. Clear/Set Instructions ................................................................................................ 369
14-10. Timing Instructions .................................................................................................. 370
14-11. Logic Instructions ..................................................................................................... 370
14-12. Error Control Instructions ........................................................................................ 371
14-13. Truth Table for FF Instruction ................................................................................. 391
14-14. Truth Table for MRS Instruction ............................................................................. 400
14-15. PERROR Syntax Error Codes ................................................................................... 426
14-16. PERROR Run-time Error Codes .............................................................................. 426
15-1. Block Comparison .................................................................................................... 434
15-2. CALCA Block Parameters ......................................................................................... 435
15-3. Arithmetic Instructions ............................................................................................. 442
15-4. Boolean Instructions ................................................................................................. 443
15-5. Input/Output Reference Instructions ........................................................................ 444
15-6. Cascade and Propagation Instructions ....................................................................... 444
15-7. Memory and Stack Reference Instructions ................................................................ 445
15-8. Program Control Instructions ................................................................................... 445
15-9. Clear/Set Instructions ................................................................................................ 446
15-10. Timing Instructions .................................................................................................. 446
15-11. Logic Instructions ..................................................................................................... 447
15-12. Error Control Instructions ........................................................................................ 447
15-13. Truth Table for FF Instruction ................................................................................. 469
15-14. Truth Table for MRS Instruction ............................................................................. 478
15-15. PERROR Syntax Error Codes ................................................................................... 505
15-16. PERROR Run-time Error Codes .............................................................................. 505
16-1. CHARC Block Parameters ........................................................................................ 512
17-1. CIN Block Parameters .............................................................................................. 530
17-2. Relationship Between IOMOPT, IVO, MA, CIN, and IN ....................................... 544
17-3. Alarm Nomenclature ................................................................................................. 547
18-1. CINR Block Parameters ............................................................................................ 555
18-2. Alarm Nomenclature ................................................................................................. 571
19-1. Compound Parameters .............................................................................................. 580
20-1. COUT Block Parameters .......................................................................................... 587
20-2. Input/Output Points, FBC10 and FBC10 Redundant .............................................. 599
20-3. Alarm Nomenclature ................................................................................................. 603
21-1. COUTR Block Parameters ........................................................................................ 612
21-2. Alarm Nomenclature ................................................................................................. 629
22-1. DEP Block Parameters .............................................................................................. 635
23-1. DGAP Block Parameters .......................................................................................... 655
24-1. DPIDA Block Parameters ......................................................................................... 690
24-2. ECB52 Parameters .................................................................................................... 721
24-3. FBM Variables .......................................................................................................... 733
24-4. Control Mode Filtering and Tuning Features ........................................................... 737
24-5. FBM I/O Variable Scaling ........................................................................................ 742
24-6. Ramping Action for SPROPT Options ..................................................................... 748
24-7. Status Bit Definitions for Parameter Value Record .................................................... 751
24-8. Parameter Settings for Block Initialization ................................................................. 754
24-9. Status of Critical Parameters ..................................................................................... 755
Tables B0193AX Rev AB
xxvii
24-10. FBM Analog Input Signal Scaling ............................................................................. 757
24-11. Input Scaling Entry Examples ................................................................................... 758
24-12. FBM Analog Output Signal Scaling .......................................................................... 759
24-13. FBM04/FBM204 Channel Assignments ................................................................... 760
24-14. FBM17/FBM227 Channel Assignments ................................................................... 762
24-15. FBM22 Channel Assignments ................................................................................... 763
25-1. DSI Block Parameters ............................................................................................... 769
26-1. DTIME Block Parameters ......................................................................................... 780
B0193AX Rev AB Tables
xxviii
xxix
Preface
This document, Integrated Control Block Descriptions, provides operational and reference informa-
tion for using I/A Series
System PROFIBUS-DP
TM
Communication Interface Module (FBM223)
Users Guide (B0400FE)
+ I/A Series
System Modbus
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24. DPIDA Controller B0193AX Rev AB
733
If supervisory option (SUPOPT) is 1 or 3 and supervisory enable (SE) is true, the controller uses
the supervisory setpoint (SUP_IN) for calculating the controller output (see Figure 24-2). For
more information, refer to Setpoint Processing on page 744 and the Supervisory Setpoint Control
(SSC) (B0193RY) document.
If SUPOPT is 0, the LR setpoint source selector, together with the two overrides, LOCSW and
REMSW, determines the setpoint source at any time. In Local, you can ramp the setpoint from
the Block Detail display.
When STRKOP = 1 or 2 while SUPOPT is 0 and LR is false, the local setpoint (SPT) tracks the
measurement when the block reinitializes or initializes with a local setpoint. This allows bumpless
return to automatic control when the controller returns to closed-loop operation.
The controller provides the MANSW and AUTSW override inputs to force the controller to the
Manual or Auto state. In Manual, you can ramp the controller output from the Block Detail dis-
play or A/M station.
When TRKENL is true, the output tracks an independent signal source (TRACK).
The DPIDA block in the CP operates in conjunction with the control algorithm in the FBM to
support tuning, scaling and alarming functions (see Figure 24-2). The block provides:
+ Absolute and deviation alarming of the measurement (see Figure 24-4)
+ Absolute alarming of the controller output
+ Bad I/O alarming.
FBM variables used in Figure 24-2 and the following sections to described controller operations
are listed in Figure 24-3.
Table 24-3. FBM Variables
Variable Description
A Setpoint lead/lag ratio (SPLLAG)
b b = KBIAS (BIAS + BBIAS)
c Controlled variable selected measurement
c
f
Butterworth filtered measurement
c
d
Derivative filtered c
f
c
i
Integral filtered c
d
D Derivative time (DERIV)
e Control error
e
g
Nonlinear gain adjusted e
e
p
Proportional filtered e
g
f
r
Scaled MULTIN
f
b
Feedback from controller output
f
bb
f
bb
= f
b
- b
f
br
f
br
= f
bb
- f
r
I Integral time (INT)
K
D
Derivative gain (KD)
K
z
Zone gain for nonlinear gain
B0193AX Rev AB 24. DPIDA Controller
734
24.6.2.1 Control Modes
The DPIDA controller performs most of the functions of the PID and PIDX blocks as well as
additional functions. The DPIDA can be configured with the following values of mode option
(MODOPT) to perform a variety of control algorithms:
1 = Proportional (P)
2 = Integral (I)
3 = Proportional-plus-Derivative (PD)
4 = Proportional-plus-Integral (PI)
5 = Proportional-plus-Integral-plus-Derivative (PID)
6 = Non-Interactive PID (NIPID).
The first five modes are the same as those of the PID and PIDX blocks, except that those having
proportional and integral action also have a setpoint lead-lag compensator. The P and PI modes
are the same as the PD and PID modes except the derivative time is set to 0.
The setpoint compensator allows the amount of proportional action applied to the setpoint to be
less than that applied to the measurement (see Figure 24-2). This enables the controller to be
tuned for both good load rejection and non-overshooting setpoint response simultaneously.
When the setpoint lead/lag ratio (SPLLAG) = 1, the controller behaves like the PID or PIDX,
applying the proportional term to the control error. This choice is best for a dominant deadtime
process. When SPLLAG = 0, no proportional term is applied to the setpoint. A value of 0.2 is best
for a dominant lag process. SPLLAG is adaptively tuned by the FBTUNE block.
m Manipulated variable
m
f
m
f
= m - f
r
m
b
m
b
= m
f
+ b
m
l
Limited m
b
m
s
m
s
= 6400 - (m
l
- LOSCAL / HOSCAL - LOSCAL)
meas1 Measurement 1
meas2 Measurement 2
meas3 Measurement 3
P Proportional band (PBAND)
r Selected setpoint
r
f
Compensated setpoint
t Time constant
x Lag input
y Lag output
Table 24-3. FBM Variables (Continued)
Variable Description
24. DPIDA Controller B0193AX Rev AB
735
The controller algorithms can be expressed using the differential operator (s = d()/dt) as follows
(see Table 24-3 for variable definitions):
+ Proportional only (P):
+ Integral only (I):
+ Proportional and derivative (PD):
+ Proportional and integral (PI):
+ Proportional, integral, and derivative (PID):
+ Non-interacting PID (NIPID):
+ In the above expressions:
m
b
100
P
---------
r c
f
( )f
r
b
t 0 =
+ =
m
b
d
1
Is
----
r c
f
( )f
r
b
t 0 =
+ =
m
b
100
P
---------
r ( 1 Ds + ( )c
f
)f
r
b +
t
D
K
D
------- =
=
m
b
100
P
---------
1
Is
---- A +
\ .
| |
r
1
Is
---- 1 +
\ .
| |
c
f
\ .
| |
f
r
b
t 0 =
+ =
m
b
100
P
---------
1
Is
---- A +
\ .
| |
r
1
Is
---- 1 +
\ .
| |
1 Ds + ( )c
f
\ .
| |
f
r
b +
1
t
---
1
I
---
1
D
---- +
\ .
| |
K
D
=
=
m
b
100
P
---------
1
Is
---- A +
\ .
| |
r
1
Is
---- 1 Ds + +
\ .
| |
c
f
\ .
| |
f
r
b +
t
D
K
D
------- =
=
c
f
c
1 ts 0.5 ts ( )
2
+ +
------------------------------------------- =
B0193AX Rev AB 24. DPIDA Controller
736
The controller algorithms can also be expressed in the time domain as follows:
+ Proportional only (P):
+ Integral only (I):
+ Proportional and derivative (PD):
+ Proportional and integral (PI):
+ Proportional, integral, and derivative (PID):
+ Non-interacting PID (NIPID):
+ In the above expressions:
m
b
100
P
---------
r c
f
( )f
r
b + =
m
b
1
I
---
r c
f
( ) t d
0
t
}
\ .
| |
f
r
b + =
m
b
100
P
---------
r c
f
D
dc
f
dt
-------
+
\ .
| |
\ .
| |
f
r
b +
t
D
K
D
------- =
=
m
b
100
P
---------
1
I
---
r c
f
( ) t d
0
t
}
Ar c +
\ .
| |
f
r
b + =
m
b
100
P
---------
1
I
---
r c
f
( ) t d
0
t
}
Ar 1
D
I
---- +
\ .
| |
c
f
D
c
f
d
t d
-------
+
\ .
| |
f
r
b +
1
t
---
1
I
---
1
D
---- +
\ .
| |
K
D
=
=
m
b
100
P
---------
1
I
---
r c
f
( ) t d
0
t
}
Ar c
f
D
c
f
d
t d
-------
+
\ .
| |
f
r
b +
t
D
K
D
------- =
=
c
f
t
c
f
d
t d
-------
-
t
2
2
-----
t
2
2
d
d c
f
- + + c =
24. DPIDA Controller B0193AX Rev AB
737
NOTE
The above expression for c
f
can also be expressed as two simultaneous integral equa-
tions, but the above expression more clearly shows the effect of t on c
f
.
The sign of the deviation (c
f
- r) signal is opposite that of the error (r - c). Scaling for engineering
units and normalized FBM counts and provision for sign reversal (INCOPT) is not shown in the
above simplified mathematical representations.
NIPID action introduces the capability of tuning to achieve complex (underdamped) numerator
roots. This capability is needed in order to achieve best performance when the process has two
dominant lags.
The DPIDA supports multiplicative and additive feedforward compensation, and local setpoint
ramping and limiting. Using extender blocks, the PIDA controller can accommodate self tuning
of feedback (FBTUNE) and feedforward (FFTUNE) parameters.
The measurement filter response is shown in Figure 24-5. The setpoint gain compensation
response is shown in Figure 24-7.
Table 24-4 summarizes the filtering and tuning features for these control modes.
24.6.2.2 Manual State
DPIDA Key Parameters: MA, MCLOPT
In Manual (MA = 0), the controller does not perform PID control and the controller output is
settable. In Manual, the controller does not adjust OUT2, the back-calculated indication of the
internal controller output expressed in percent.
During a transition to Manual while MANALM is false, the controller clears all alarm and limit
indicators. If the manual clamp option MCLOPT is true, the controller limits any value sets of
the output parameter.
The MA parameter allows an operator, another block, or a supervisory program to switch between
the Manual and Auto states. Transfer to Auto is bumpless (see Bumpless Start-up and Transfers
on page 739).
When MA is toggled, its status is immediately displayed on the faceplate of the Block Detail Dis-
play.
Table 24-4. Control Mode Filtering and Tuning Features
Feature
Control Mode
P I PD PI PID NIPID
Measurement filtering X X X
Setpoint compensation X X X
Nonlinear gain X X X X X X
Multiplicative input MULTIN X X X X X X
Bias input BIAS X X X X X X
FFTUNE feedforward tuning X X X
FBTUNE feedback tuning X X X
B0193AX Rev AB 24. DPIDA Controller
738
24.6.2.3 Auto State
DPIDA Key Parameters: INT, MA, OUT, SELRQ
In Auto (MA = 1), the controller performs the appropriate mode of control. Closed loop auto-
matic control is actually performed in the substate of Auto called Controlling. In this state, the
controller computes the output command signal in response to the setpoint (r) and measurement
(c
f
), according to the configured controller mode. The controller generates integral control action
using the integral-feedback signal (f
b
) that is back calculated (f
br
) and fed through a first-order lag
in a positive feedback arrangement. The integral (INT) setting establishes the time constant of the
lag. f
b
is tied to the controller output (OUT).
In Auto, the controller uses either the measurement signal selected by the FBM or the signal
selected by the operator via SELRQ (see Measurement Processing on page 756).
If all measurement inputs are bad, the MEAS.BAD status is set true and the controller automati-
cally transitions to Hold or Manual, depending on the MBADOP and CEOPT settings, and
holds the control output at the last good value.
24.6.2.4 Manual/Auto Overrides
DPIDA Key Parameters: AUTSW, CEOPT, INITMA, MA, MANSW, MBADOP
Since it is possible to set the parameters which invoke these block states simultaneously, certain
states have priority over other states for execution. If multiple block states are set, states with
higher priority will override those with lower priority as listed below.
The priority of the Manual/Auto overrides is as follows when MA is unlinked, with 1 being the
highest priority:
1. MBADOP and MANSW have equal priority
2. AUTSW
3. INITMA
4. MA
5. HOLD
6. CEOPT
7. TRKENL.
If MBADOP = 1 or 2 and the MA parameter is unlinked, the controller sets the MA input to
Manual and secures it when the MEAS.BAD or MEAS.OOS status bit is true. This forces the
output state to Manual as long as one or both of these bits is true. After the BAD or OOS status
clears, returning to Auto requires external intervention unless AUTSW is true.
MBADOP has the same priority as the MANSW override, and it has precedence over the
AUTSW override. If MBADOP = 1 or 2 and a BAD or OOS status is detected while MA is
unlinked, the controller goes to Manual regardless of the AUTSW setting.
If MANSW is true, it drives the controller to Manual by setting MA to false and securing it.
MANSW has priority over AUTSW. If both MANSW and AUTSW are true, the controller goes
to Manual.
If AUTSW is true, it drives the controller to Auto by setting MA to true and securing it.
CEOPT enables implicit control error handling of HOLD, STRKOP, and MBADOP. When
CEOPT is enabled, a control error is detected if the MEAS input has a status such as OOS, BAD,
or off-scan. If MBADOP = 1 or 2, a control error forces the controller to Manual. If MDADOP
24. DPIDA Controller B0193AX Rev AB
739
is set false, a control error forces the controller to Hold if MA is set to Auto, and it disables set-
point tracking if SPTRKOP is set true.
If CEOPT is not enabled, then control error detection is not performed, and MBADOP, HOLD,
and SPTRK handling is performed explicitly by asserting the HOLD input.
24.6.2.5 Holding State
DPIDA Key Parameters: HOLD, MBADOP
ECB52 Key Parameter: FSOPT
If the HOLD input is set to 1 while controlling in Auto, the controller stops the control calcula-
tion and holds the output at the last good value. If the controller experiences an open loop condi-
tion, it automatically transitions to Hold or Manual to prevent integral windup depending on
MBADOP and FSOPT. Transfer back to Auto is bumpless (see Bumpless Start-up and Trans-
fers on page 739).
24.6.2.6 PRIBLK and PRITIM Functionality
DPIDA Key Parameters: MEAS, PRIBLK, PRITIM
The Primary Block (PRIBLK) parameter indicates whether the DPIDA block has a connection
from an upstream block (PRIBLK=1) or not (PRIBLK=0). Its value, together with that of the
Primary Cascade Timer (PRITIM), determines whether the DPIDA block remains in Hold for a
fixed time delay (of length defined by PRITIM), or ends the Hold when the Acknowledge status
bit (Bit 10) of MEAS is detected from the upstream block (if PRITIM = 0.0). During initializa-
tion, the acknowledgement is not required and a Hold of one cycle only occurs.
24.6.2.7 Output Tracking State
DPIDA Key Parameters: OUT, TRACK, TRKENL
If TRKENL is set to 1 while controlling in Auto, the controller output (OUT) is forced immedi-
ately to follow the TRACK input. Transfer back to Auto is bumpless (see Bumpless Start-up and
Transfers on page 739).
24.6.2.8 Bumpless Start-up and Transfers
DPIDA Key Parameters: BCALCO, HOLD, MEAS, PRIBLK, SPT, STRKOP, TRKENL
Any transition from Manual, Holding, or Tracking to the Controlling state is performed
bumplessly by back-calculating the PID dynamics in the FBM (that is, the integral term absorbs
any proportional action and the derivative term is set to zero), so that the output maintains its
present value at the moment the transition occurs.
A transfer of the setpoint source from Remote to Local is inherently bumpless, because SPT
retains the last value that was transferred from the remote setpoint.
The setpoint track option (STRKOP) forces the local setpoint (SPT) to track the measurement
when the block reinitializes or initializes with a local setpoint. While setpoint tracking is active,
SPT is secured (nonsettable) to prevent you from manipulating the local setpoint value.
24.6.2.9 Cascade Handling
DPIDA Key Parameters: BCALCO, BLKSTA, CEOPT, INCOPT, MEAS, PRIBLK, RSP, SPT
B0193AX Rev AB 24. DPIDA Controller
740
The DPIDA controller can only be at the bottom of the cascade. A typical cascade configuration
using the DPIDA controller is shown in Figure 24-3.
Figure 24-3. Cascade Configuration (Typical)
To provide bumpless initialization of the upstream block in the cascade:
+ Set PRIBLK to true for the secondary controller (DPIDA).
+ Set PRIBLK to false for the primary controller.
+ Link BCALCI of the primary controller to BCALCO.
+ Link FBK (external reset) of the primary controller to BCALCO of the secondary
controller.
In a cascade configuration, control philosophy provides that the FBK (external integral feedback)
of the primary controller be connected to the BCALCO of the secondary controller to prevent
windup. Use the PRIBLK option in all cascade configurations.
The cascade initialization information is contained in the status bits of BCALCO which is con-
nected to BCALCI of the upstream block. For the BCALCO status bit definitions, see
Table 24-7.
The settings of SPT and BCALCO on transition from initialization depend on the type of initial-
ization, conditional and unconditional.
Conditional initialization occurs when the controller returns from an open cascade that was
caused by a Remote/Local, Auto/Manual, or Track transition. For a DPIDA secondary controller,
SPT remains unchanged, and BCALCO = SPT at transition.
Unconditional initialization occurs when the controller returns from an open cascade that was not
caused by a Remote/Local, Auto/Manual, or Track transition. For a DPIDA secondary controller,
SPT tracks MEAS, and BCALCO = MEAS at transition.
In order to trigger upstream initialization in a cascade, the appropriate BCALCO status bits
remain set while the setpoint is switched to Local. This notifies an upstream block to perform its
own explicit initialization, while the cascade remains open, enabling a return to remote setpoint
operation to be bumpless.
If the upstream block is in Auto, it initializes when its BCALCI initialization status bit is true and
then acknowledges the initialization request by setting the RSP acknowledge status bit. During
initialization, the output tracks the value of the BCALCI input. If the downstream block is a
DPIDA controller, this action causes its remote setpoint to track its BCALCO output when it is
connected to the upstream blocks BCALCI input. As a result, a return to closed loop control is
bumpless.
The appropriate BCALCO status bits of the DPIDA controller are set in the Tracking
(TRKENL = 1) or Holding (HOLD = 1) state. This requests its upstream block to perform its
own initialization. When TRKENL or HOLD are reset to 0, the controller returns to the Con-
trolling substate of Auto to resume closed loop control.
PRIBLK = 0
MEAS
PID
Block
FBK
BCALCI
OUT
PRIBLK = 1
RSP
MEAS
BCALCO
DPIDA
24. DPIDA Controller B0193AX Rev AB
741
The PRIBLK option allows a downstream block to initialize before the uptream block has
matched its output to its BCALCI input. The PRIBLK feature is needed if the upstream blocks
computing interval is the greater of the two, which is the case for a DPIDA controller.
The BCALCO status is updated each BPC to indicate when SPT has exceeded the high or low
limit. The upstream block uses this status to prevent integral windup.
24.6.2.10 Output Limiting
DPIDA Key Parameters: HOLIM, HOLIND, HSCO1, LOLIM, LOLIND, LSCO1, MCLOPT,
OSV
In Auto, the computed controller output (m
l
) value undergoes limiting, whereby it is limited
between the output limits, HOLIM and LOLIM (see Figure 24-2). These limits can be placed
anywhere within the range defined by HSCO1 and LSCO1. This range can be expanded in both
directions beyond the specified scale limits HSCO1 and LSCO1, by an amount equal to the out-
put span variance parameter OSV. If you set HOLIM less than LOLIM, then HOLIM is auto-
matically set equal to LOLIM. If the controller output (OUT) is limited at HOLIM or LOLIM,
the respective boolean output limit indicator, HOLIND or LOLIND, is set true.
MCLOPT affects output limiting as follows:
+ When MCLOPT = 1 (true), the computed controller output (m
l
) value undergoes
limiting as above.
+ When MCLOPT = 1 (true) and the controller is in Manual, the output is limited
between HSCO1 and LSCO1.
+ When MCLOPT = 0 (false) and the controller is in Manual, the output is limited
between HSCO1 + OSV and LSCO1 - OSV as shown in Figure 24-4.
Figure 24-4. Output Limiting
When an output limiting condition is detected in the FBM for a controller with integral action,
the integral term is managed to prevent integrator windup. If the controller prelimited output
becomes greater than HOLIM or less than LOLIM, the integral term is managed to provide rapid
recovery with almost no overshoot (similar to LIMOPT = 1 in the PIDA block).
Output limiting in the DPIDA controller is propagated to an upstream block through the status
bits of its BCALCI input, provided that it is linked to the BCALCO output of the DPIDA con-
troller.
OSV (units)
HSCO1
LSCO1
OSV (units)
Output
Time
B0193AX Rev AB 24. DPIDA Controller
742
24.6.2.11 FBM I/O Variable Scaling
DPIDA Key Parameters: See Table 24-5.
FBM input/output (I/O) variables, their scaling ranges, and related CP parameters are listed in
Table 24-3. Range and engineering units can be assigned to the listed CP parameters. The ranges
are used for analog displays and for relating proportional band (PBAND in %) to the inputs and
outputs.
The CP scales input parameters and then converts them to counts before sending them to the
FBM. The CP converts the count outputs received from the FBM and scales them for use in
alarming and transfers to Manual.
24.6.2.12 Measurement Filtering
DPIDA Key Parameters: DERIV, KD
For the PD, PID, and NIPID control modes, the measurement low-pass filter is a second order
Butterworth filter with time constant DERIV / KD (see Figure 24-5). Its purpose is to reduce
high-frequency valve activity. The default setting of KD is 10.
Table 24-5. FBM I/O Variable Scaling
FBM Variable Description Unit Range CP Related Parameter
A Setpoint lead/lag ratio 0 to 1 SPLLAG
--- --- RO1 BIAS
--- Controlled variable measurement RI1 MEAS
D Derivative time minutes DERIV
--- --- RIN MULTIN
--- --- % OUT2
holim High output limit clamped to RO1 RO1 HOLIM
hzone Zone high limit for nonlinear gain 0 to 100% HZONE
I Integral time minutes INT
K Derivative gain 0.1 to 100.0 KD
kzone Gain for nonlinear zone --- KZONE
lolim Low output limit clamped to RO1 RO1 LOLIM
lzone Zone low limit for nonlinear gain 0 to 100% LZONE
m
l
Manipulated variable limited RO1 OUT
meas1 Measurement 1 RI1 MEAS1
meas2 Measurement 2 RI1 MEAS2
meas3 Measurement 3 RI1 MEAS3
P Proportional band % PBAND
r Selected setpoint RI1 SPT
track Track input RO1 TRACK
24. DPIDA Controller B0193AX Rev AB
743
Figure 24-5. Butterworth Measurement Filter Response
The Butterworth measurement filter response can be expressed as follows:
Measurement filtering can be useful even when derivative action is not used, such as when the
process has a high frequency resonance. In this case, choose DERIV to have a small nonzero value
and KD to have a value less than one, such that the filter time constant
(DERIV / KD) is large enough to provide significant attenuation at the resonant frequency. The
range of KD is restricted to be not less than 0.1 and not greater than 100.
In all control modes, the measurement (c) is fed through a Butterworth filter. For the P, I, and PI
control modes, the derivative time (DERIV) is set to 0, thus providing no measurement filtering.
A noisy is measurement requires proper filtering to remove unwanted noise:
0 .1 .2 .3 .4 .5 .6 .7 .8 .9
.1
.2
.3
.4
.5
.6
.7
.8
.9
1.1
0
1.0
1.0
Time (s)
t t = DERIV / KD = 0.1 s
Input Step
Output
c
f
t
c
f
d
t d
-------
-
t
2
---
t
2
2
d
d c
f
- + + c input measurement =
or
c
f
c
1 ts 0.5ts
2
+ +
-------------------------------------- output filtered measurement = =
=
B0193AX Rev AB 24. DPIDA Controller
744
+ Use anti-alias filtering with CYCTIM and FILTIM set to 50 ms. Faster cycle times
can cause problems (see Controller Cycle Time and Measurement Sampling on
page 755).
+ For noisy measurements less than 50 to 60 cycles/seconds, set KD appropriately
(decreasing KD provides more filtering).
+ With FBTUNE feedback tuning, increase the threshold parameter THRESH for peak
detection.
24.6.2.13 Setpoint Processing
The selected setpoint is scaled, limited, and gain-compensated before calculating the control error
(e) (see Figure 24-2). The supervisory option (SUPOPT) allows an application to control the set-
point. The LR parameter allows an operator or another block to switch between the local and
remote setpoints. The Local and Remote latch switch inputs (LOCSW and REMSW) allow the
controller to be switched to Local or Remote setpoint by overriding the LR parameter. In Local,
you can ramp the setpoint from the Block Detail display.
24.6.2.13.1 Supervisory Setpoint
DPIDA Key Parameters: SE, SUP_IN, SUPBCO, SUPOPT
When the supervisory option (SUPOPT) is set to 1-4, it specifies that the controller can be under
control of a supervisory application program. The supervisory back calculated output (SUPBCO)
provides the current setpoint and initialization bits to the supervisory application program.
When supervisory enable (SE) is set by the application program or operator, the DPIDA control-
ler is prepared to do supervisory setpoint control (SSC) functions. When the proper handshaking
occurs with the application software, the controller accepts sets to the supervisory setpoint
(SUP_IN). If the controller is in Auto, it then uses the supervisory setpoint in the calculation of
the controller output.
If SUPOPT is set to 1 or 2, the handshake requires the application software to return an explicit
acknowledge to close the supervisory cascade. The software must set the ACK status bit in the
SUP_IN parameter using special OM access functions. However, if SUPOPT is set to 3 or 4, this
acknowledgement is implicitly provided by the CP and is not required from the user application
software. In the latter case, the CP closes the supervisory cascade automatically when the supervi-
sory input (SUP_IN) is written by the application, provided the block is in the Supervisory Ini-
tialization (SUP_INIT) state. The control block enters the SUP_INIT state when supervisory
control is enabled in the block and the cascade is closed downstream. Upon entering this state, the
CP sets the initialize request bit (INITC) in the SUPBCO parameter for the application software.
When SUP_IN is then written by the software, the CP access logic sets the ACK status automati-
cally in the SUP_IN parameter. When the block runs, the CP block logic then closes the supervi-
sory cascade automatically.
A typical Supervisory Setpoint Control cascade configuration using the DPIDA controller is
shown in Figure 24-6. The DPIDA controller can only be at the bottom of the cascade.
24. DPIDA Controller B0193AX Rev AB
745
Figure 24-6. Supervisory Setpoint Control Cascade Configuration (Typical)
For more information, refer to the Supervisory Setpoint Control (SSC) (B0193RY) document.
24.6.2.13.2 Local/Remote Overrides
DPIDA Key Parameters: INITLR, LOCSP, LOCSW, LR, REMSW
When the Local switch (LOCSW) override is true, it sets LR to false (Local) and secures it.
LOCSW has priority over REMSW, INITLR, and LOCSP. If both LOCSW and REMSW are
true, LR is set to Local.
When the Remote switch (REMSW) override is true, it sets LR to true (Remote) and secures it.
REMSW has priority over INITLR and LOCSP.
24.6.2.13.3 Setpoint State
DPIDA Key Parameters: INITLR, LOCSW, LR, MEAS, REMSW, SPT, STRKOP, TRKENL
The setpoint states are:
+ Remote
+ Tracking
+ Local.
The INITLR, REMSW, and LOCSW overrides are applied to the LR parameter as described
above and in Block Initialization on page 754.
If LR is true, the setpoint state is Remote. If STRKOP = 1 or 2, the setpoint state is Local, and the
status of MEAS is not Bad, the setpoint SPT tracks MEAS when (STRKOP = 1) the block is in
Manual or the cascade state is Open, or when (STRKOP = 2) the block is in Manual only.
24.6.2.13.4 Local/Remote Setpoint Selection
DPIDA Key Parameters: LR, MEAS, PRIBLK, RSP, SPT, STRKOP
The setpoint (SPT) is a configurable output whose source is determined by LR. If LR is true
(Remote), SPT is secured and assumes the Remote setpoint (RSP) value. If LR is false (Local),
SPT is unsecured and can be changed by the operator. When LR is toggled, its status is immedi-
ately displayed on the faceplate of the Block Detail Display.
Operator
Displays
Supervisory
Application
MEAS
PID
Block
OUT
FBK
BCALCI
SUPBCO
DPIDA
Block
SUP_IN
SE
LR
SUPOPT
RSP
MEAS
BCALCO
B0193AX Rev AB 24. DPIDA Controller
746
24.6.2.13.5 Setpoint Limiting
DPIDA Key Parameters: HSCI1, LSCI1, SPCLMP, SPHLIM, SPLLIM
The setpoints limits are clamped as follows.
+ If SPLLIM < LSCI1, it is set to LSCI1.
+ If SPLLIM > HSCI1, it is set to HSCI1.
+ If SPHLIM < SPLLIM, it is set to SPLLIM.
+ If SPHLIM > HSCI1, it is set to HSCI1.
If SPCLMP = 0, and the setpoint state is Supervisory, Remote, or Tracking, the SUP_IN/RSP
value is clamped as follows:
+ If SUP_IN/RSP <= LSCI1, it is set to LSCI1
+ If SUP_IN/RSP >= HSCI1, it is set to HSCI1.
If SPCLMP = 1, the SPT value in Local mode (RSP in Remote mode, SUP_IN in Supervisory
mode) is clamped as follows:
+ If RSP/SUP_IN <= SPLLIM, it is set to SPLLIM.
+ If RSP/SUP_IN >= SPHLIM, it is set to SPHLIM.
If SPCLMP = 2, an attempt to set SPT in Local mode (RSP in Remote mode, SUP_IN in Super-
visory mode) less than SPLLIM or greater than SPHLIM via an OM Setval or OM Write opera-
tion will be rejected with an OUT_OF_RANGE error code. If RSP has a source connection, it is
clamped as follows:
+ If RSP <= SPLLIM, it is set to SPLLIM.
+ If RSP >= SPHLIM, it is set to SPHLIM.
NOTE
When SPCLMP=0, the following special rules regarding setpoint limiting apply:
1. The SPHLIM and SPLLIM limits will be ignored while the block is in Remote
mode.
2. The SPHLIM and SPLLIM limits will be used to limit the setpoint value when
the block is switched to Local mode if the setpoint is within these limits when the
switch occurs.
3. If the setpoint is above SPHLIM (or below SPLLIM) when the block is switched
to Local mode, it will remain above SPHLIM (or below SPLLIM) when the switch
occurs to avoid a bump in the control action. The effective limits are allowed to
balloon beyond the actual limits while the block is in Remote mode to accomplish
this action when the block is switched to Local mode.
4. If the setpoint is above SPHLIM (or below SPLLIM) when the block is switched
to Local mode, it can be lowered (or raised), but once lowered (or raised), it cannot
be raised (or lowered) if it continues to be above SPHLIM (or below SPLLIM). (For
example, if the setpoint is 90.0 and SPHLIM=80.0, the setpoint will remain at 90.0
when the block is switched to Local mode. If the setpoint is lowered to 85.0, it can-
not be raised since 85.0 exceeds the SPHLIM value of 80.0. Once the setpoint is
lowered below SPHLIM, the SPHLIM value will then be used once again to limit
the setpoint value.).
24. DPIDA Controller B0193AX Rev AB
747
24.6.2.13.6 Setpoint Gain Compensation
DPIDA Key Parameters: INT, SPLLAG, SPT
Lead/lag compensation is applied to the setpoint with a user specified lead/lag ratio (SPLLAG see
Figure 24-7). SPLLAG adjustment allows the amount of proportional action applied to the set-
point to be different from that applied to the measurement (see Figure 24-2). This enables the
controller to be tuned for both good load rejection and non-overshooting setpoint response
simultaneously.
When the setpoint lead/lag ratio (SPLLAG) = 1, the controller behaves like the PID or PIDX,
applying the proportional term to the control error. This choice is best for a dominant deadtime
process.
When SPLLAG = 0, no proportional term is applied to the setpoint. A value of 0.2 is best for a
dominant lag process. SPLLAG is adaptively tuned by the FBTUNE block.
For the input (r) step shown in Figure 24-7, the lead/lag compensator output immediately rises to
the value SPLLAG (A). Then the output (r
f
) rises exponentially from SPLLAG to 1.0r with a first
order lag response of time constant INT.
Figure 24-7. Setpoint Lead/Lag Compensation
For example if SPLLAG is set to 0.5, the output at the end of one time constant is:
24.6.2.13.7 Setpoint Ramping
DPIDA Key Parameters: SPHLIM, SPLLIM, SPRAMP, SPRATE, SPROPT, SPT, SPTARG
If SPROPT is 1 and LR is Local, the setpoint ramps at the rate SPRATE (units/minute) from its
initial value to SPTARG, following an SPRAMP transition from 0 to 1.
If SPROPT is 2, ramping stops whenever the deviation (MEAS - SPT) is in alarm and continued
setpoint ramping would increase the deviation. If ramping decreases deviation, ramping is not
inhibited.
If SPROPT is 3 and LR is Local, the setpoint ramps from its initial value to SPTARG during the
time period SPRATE (minutes).
t = INT
A
1.0
Input r
Output rf
A = SPLLAG
Time
r
f
A 0.63 r A ( ) + 0.5 0.63 1.0 0.5 ( ) + 0.815 or 0.815r = = =
B0193AX Rev AB 24. DPIDA Controller
748
If SPROPT is 4, ramping stops whenever the deviation is in alarm and continued setpoint ramp-
ing would increase the deviation. If ramping decreases deviation, ramping is not inhibited.
Table 24-6 summarizes the setpoint ramping action for the SPROPT options.
To be accepted, an SPTARG value must be within the local setpoint limits, SPLLIM and
SPHLIM. When SPT reaches SPTARG or if the operator makes a local SPT change, setpoint
ramping stops and SPRAMP is reset to 0.
If SPTARG is changed during ramping, the block continues to ramp at the initial rate calculated
for the SPRATE time.
24.6.2.13.8 Error Propagation
DPIDA Key Parameters: CEOPT, MEAS, OUT, PROPT, SPT
Errors in the MEAS and SPT parameters are propagated to the ERR status bit of the OUT
parameter based on the control error option (CEOPT) and propagate error option (PROPT).
If the MEAS or SPT status is BAD or OOS while in Auto with PROPT set true and CEOPT
set to 1, the ERR status bit of OUT is set true.
If the MEAS or SPT status is BAD, OOS, or ERR while in Auto with PROPT set true and
CEOPT set to 2, the ERR status bit of OUT is set true.
24.6.2.14 Nonlinear Gain
DPIDA Key Parameters: KZONE, LZONE, NONLOP
A nonlinear gain option (NONLOP) specifies a gain factor (KZONE) and a zone of control error
values in which this alternate gain multiplies 100/PBAND (see Figure 24-8). This nonlinear zone
is defined by the HZONE and LZONE positive real values, and is situated, but not necessarily
centered, about zero error.
Table 24-6. Ramping Action for SPROPT Options
SPROPT
Rate
(Units/Minutes) Time (Minutes)
Stop on
Deviation Alarm
1 X
2 X X
3 X
4 X X
24. DPIDA Controller B0193AX Rev AB
749
Figure 24-8. Nonlinear Gain Response
Nonlinear gain allows the controller to handle a process with nonlinear gain (for example, a pH
process) by providing a gain characteristic that is opposite that of the process. You set the width of
the zone and the gain (slope) of the line within the zone. The slope typically varies from 0 to 1.0.
At zero slope, the line between the low and high zone limits is horizontal. At a slope of 1.0, the
nonlinear characteristic is completely removed, and the controller behaves as a conventional linear
controller as shown by the dashed line in Figure 24-8.
The proportional gain (G) in the linear part of the response curve where the slope = 1.0 is:
The effective gain (G
e
) within the zone is:
The effective proportional band (P
e
) within the zone is:
HZONE LZONE
De
Deg
Slope = 1.0
Slope = 1.0
40
30
20
10
0
10
20
30
40
-40 -30 -20 -10
Control Error (e)
0
Linear Response
10 20 30 40
Slope = 1.0
Nonlinear Response
Slope = KZONE = Deg / De
eg = KZONE e
Characterized
Control
Error (eg)
G
100
PBAND
--------------------- =
G
e
KZONE
100
PBAND
---------------------
- =
P
e
PBAND
KZONE
--------------------- =
B0193AX Rev AB 24. DPIDA Controller
750
24.6.2.15 Feedforward
DPIDA Key Parameters: BIAS, MULTIN
There is provision for both multiplicative MULTIN and additive BIAS feedforward inputs (see
Figure 24-2). The multiplicative input divided by its span (f
r
) multiplies the output (m) of the lin-
ear part of the control algorithm. The gain/offset adjusted and scaled bias input (b) is added to m
f
before output limiting is applied. A back calculation is applied to feedback input f
b
, using the pre-
vious values of these feedforward terms to achieve the integral-feedback input f
br
to the linear part
of the algorithm.
If either the BIAS or MULTIN value becomes invalid, its last valid value is used.
24.6.2.16 Error Detection
DPIDA Key Parameters: BCALCO, CEOPT, MA, MEAS, RSP, SPT
ECB52 Key Parameters: HORVAL, LORVAL, MEAS, OORENB, REDOPT
During Auto operation, the critical inputs MEAS, SPT, and MA are checked for any data errors.
Such errors include: off scan, out-of-service, and bad, which are reflected by the status of the con-
nected source. If any of these errors are detected, the error is indicated.
If CEOPT is set and any of these errors are detected, the controller output is forced to a substate
of Auto called Holding, whereby the last controller output (OUT) value is retained. If redundant
measurements are configured, the controller does not go to Holding unless all redundant mea-
surements are bad. In the Holding state, the held output value undergoes output limiting.
When all error conditions have ceased, the controller returns to the Controlling substate of Auto
to resume closed loop control.
Input errors are classified on a functional basis related to feedback control. Control errors affect
the ability to perform control in a local setpoint mode. Control errors include any errors detected
in the feedback portion of the local control loop. They do not include errors that originate
upstream through the remote setpoint path. If the remote setpoint RSP is in error, the controller
simply transitions to local SPT, holds the last valid value, and indicates that the cascade has
opened. When the error conditions clears, the appropriate BCALCO status bits reset to cause the
upstream block to initialize its OUT to BCALCI.
Global error detection is propagated to upstream blocks via the bad status indicator of the
BCALCO parameter record. In this manner, any errors detected along the cascade are propagated
up through the cascade, from block to block, by the BCALCO-to-BCALCI connections.
The FBM performs out-of-range checking on all configured measurement inputs using ECB52
parameters. If the out-of-range enable (OORENB) parameter is set true and a measurement input
configured by REDOPT exceeds the high out-of-range (HORVAL) or low out-of-range (LOR-
VAL) value, the Bad status bit of the associated MEASn parameter is set true. The Bad status bit
of the selected measurement (MEAS) is set true only if all redundant measurements are Bad.
The status of each block parameter value record is made up of the following 16 bits:
The bit definitions are listed in Table 24-7.
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Boolean B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16
24. DPIDA Controller B0193AX Rev AB
751
24.6.2.17 Alarms
DPIDA Key Parameters: BAD, CRIT, HDALIM, HHALIM, HOALIM, INHALM, INHIB,
INHOPT, LDALIM, LLALIM, LOALIM, MANALM, MEAS, MEASHL, MEASLL, OUT,
PRTYPE, SPT, UNACK
The DPIDA block optionally supports the following alarms:
+ Bad I/O
+ Measurement absolute high-high (HHABS) and low-low (LLABS)
+ Measurement absolute high (HIABS) and low (LOABS)
+ Deviation high (HIDEV) and low (LODEV)
Table 24-7. Status Bit Definitions for Parameter Value Record
Bit Number
(0 to 15) Name Definition
Boolean
Connection
(B16 to B1)
0 to 4 Data Type:
1 = character
2 = integer
3 = real
4 = string
5 = boolean
6 = long integer
7 = (unused)
8 = short integer
9 = packed boolean
10 = packed long
B16 to B12
5 to 7 OM Status:
0 = No Response
1 = On Scan
2 = Disconnect
3 = Deleted
4 = Nonconnect
5 (unused)
6 (unused)
7 = Not sent
B11 to B9
8 BAD Bad I/O B8
9 SECURE Secure/Release B7
10 INITC/ACK Initialize Conditional/Acknowledge B6
11 OOS Out of Service B5
12 SHADOW Shadow Parameter B4
13 LHI Limited High B3
14 LLO Limited Low B2
15 ERROR/INITU Error/Initialize Unconditional B1
B0193AX Rev AB 24. DPIDA Controller
752
+ Output high (HIOUT) and low (LOOUT)
The block generates alarm messages on transition into the alarm state, and on return to normal of
the alarm condition.
Bad I/O Alarm occurs when the BAD parameter is set. If redundant measurements are used, the
block generates a separate alarm message when any measurement is bad, but it sets the Bad I/O
Alarm state and BAD parameter only when all of the measurements are bad.
High, low, high-high, or low-low absolute alarming occurs when the measurement exceeds the
related alarm limit (MEASHL, MEASLL, HHALIM, or LLALIM).
High or low deviation alarming occurs when the deviation (SPT - MEAS) exceeds the related
alarm limit (HDALIM or LDALIM).
High or low output alarming occurs when OUT exceeds the related alarm limit (HOALIM or
LOALIM).
Separate deadbands for high and low absolute, deviation, and output alarming establish hysteresis
about the limits to avoid intermittent state changes, when the MEAS, deviation (SPT- MEAS),
or OUT is close to one of the limits.
High-high, high and low absolute, deviation, and output alarms have their own alarm group
parameter that is used for dispatching alarm messages to the alarm devices contained in the group.
The CINHIB (compound parameter), INHIB, or INHALM parameter settings allow each alarm
to be dynamically inhibited.
The INHOPT value defines the type of alarm inhibiting:
0 = Disable alarm messages when alarms are inhibited
1 = Disable alarm detection when alarms are inhibited
2 = Same as 0, and enable automatic acknowledgment
3 = Same as 1, and enable automatic acknowledgment
Clearing the UNACK parameter acknowledges the alarms.
In Auto, the block processes all alarms.
When the block is in Manual, the MANALM value determines which alarms are processed:
0 = Disable all alarms in Manual
1 = Process all alarms in Manual
2 = Disabled only Output alarming in Manual
3 = No output alarming in Track
4 = No output alarming in Manual or Track
When an Auto-to-Manual state transition occurs, the block examines the MANALM option.
If MANALM = 0, the block clears the alarm information that it contains and queues an
ALARM_ACK message if the UNACK parameter was set prior to the transition. This alarm
information includes the alarm status (ALMSTA), CRIT, PRTYPE, and alarm output parameters
for high-high, high, and low absolute, deviation, and output alarms.
If MANALM = 1, the block does not clear the alarm information that it contains.
If MANALM = 2, the block clears the alarm information that it contains only for the output
alarms.
24. DPIDA Controller B0193AX Rev AB
753
If MANALM = 3, no output alarms are detected when the DPIDA block goes into the Track
mode due to a downstream open loop condition.
If MANALM = 4, no output alarms are detected when the block is in Manual mode or the
DPDIA block goes into the Track mode due to a downstream open loop condition.
The block clears the CRIT and PRTYPE parameters only if there are no outstanding output
alarms prior to the transition to Manual. In this case, it queues an ALARM_ACK message if the
UNACK parameter had been set prior to the transition.
When the compound is turned on or off, or when the block is switched from Auto to Manual, an
appropriate ALARM_ENA or ALARM_DSB message is sent to all alarm devices configured in
the block; if the Station Block is configured to do this.
If you turn off an existing alarm option by reconfiguring an alarm option parameter, an
ALARM_DSB message is issued when the block is restarted. If an alarm was active prior to the
reconfiguration, and no other alarms are now active, and INHOPT specifies auto-acknowledge,
the alarm is acknowledged, an ALARM_ACK is sent to all alarm devices configured in the block,
and CRIT and PRTYPE are cleared.
24.6.2.18 Validation Checks
The DPIDA block in the CP validates the configuration parameters when it is installed, reconfig-
ured, or restarted by installing the ECB52 block.
Tuning Block Connections
DPIDA Key Parameters: STATEB, STATEF
If either tuning extender parameter, FBTBLK (for FBTUNE) or FFTBLK (for FFTUNE) is con-
figured, the DPIDA block verifies that the specified tuning block is currently connected to it. If
the tuning block is not connected, the DPIDA block sets the STATEF and/or STATEB parameter
to off, and clears the connection to the tuning block.
Mode Option
DPIDA Key Parameters: MODOPT, ERCODE
The block checks MODOPT for valid range (1 to 6). If it is invalid, the block sets ERCODE to
INV_OPTION, and enters the undefined state.
ECB52 Connection
DPIDA Key Parameters: ERCODE, IOM_ID
The block establishes the connection to the ECB52 block using IOM_ID. If the ECB52 block
does not exist or if it is of the wrong software or hardware type, the block sets ERCODE to
ECB_UNDEFINED and enters the undefined state. The only valid hardware types are FBM04,
FBM17, FBM22, FBM204, and FBM227.
Engineering Ranges
DPIDA Key Parameters: HSCI1, HSCI2, HSCIN, HSCO1, LSCI1, LSCI2, LSCIN, LSCO1
The block checks the engineering ranges (RI1, RI2,RIN, and RO1) for crossover of the high and
low values. If any high value is less than its corresponding low value, the block sets ERCODE to
INV_ENG_RANGE and enters the undefined state.
B0193AX Rev AB 24. DPIDA Controller
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24.6.2.19 Block Initialization
DPIDA Key Parameters: See Table 24-8.
After parameter validation, the DPIDA block in the CP initializes when the:
+ Block is installed.
+ Block is reconfigured.
+ Block is restarted by installing the ECB52 block.
+ Control Processor is rebooted.
+ Compound containing the block is turned on.
Table 24-8 lists the block parameter settings for block initialization.
* If the block is NOT restarting following an on-line upgrade warm start or a turning on of the com-
pound.
** If the block is NOT restarting following an on-line upgrade warm start or a turning on of the com-
pound, else MA =1.
***If the block is restarting due to a CP reboot, block install, or turning ON of the compound.
24.6.2.20 Exception Processing
DPIDA Key Parameters: BCALCO, ERCODE, MA, MEAS
Each basic processing cycle (BPC), the DPIDA block in the CP performs the following exception
processing:
+ Validation of the FBTUNE and FFTUNE block connections
+ Validation of the ECB52 block connection
+ Status updating of all parameters
+ Failsafe action
+ Auto/Manual override actions
+ Remote/Local override actions
Table 24-8. Parameter Settings for Block Initialization
Parameter Condition Resulting Value
LR LOCSP = 1 LR = 0 and secured
LR * INITLR = 0 LR = 0
INITLR = 1 LR = 1
INITLR = 2 LR is unchanged
MA ** INITMA = 0 MA = 0
INITMA = 1 MA = 1
INITMA = 2 MA is unchanged
OUT --- OUT = 0 on a cold start.
OUT = present value on a transition to or from Failsafe.
BCALCO --- BCALCO = MEAS or SPT depending on the setpoint state.
STATEB --- STATEB = off
STATEF --- STATEF = off
SPTARG *** SPROPT = 1 SPTARG = SPT
24. DPIDA Controller B0193AX Rev AB
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The block validates the tuning block connections as it does during initialization (see Validation
Checks on page 753).
If the ECB52 connection is lost, the block sets ERCODE to INV_ECB, enters the undefined
state, and executes the shutdown logic.
The block updates the status of the critical parameters MEAS, MA, and BCALCO for the follow-
ing important status:
If REDOPT is configured for redundancy, the block sets the measurement status to bad only
when all measurements are bad. For more information on block Bad, Shutdown and Bad states,
refer to the appropriate Integrated Control Software Concepts document (B0700AG or B0193AW).
If the FBM transitions to the Failsafe state, the DPIDA block opens the upstream cascade by set-
ting the appropriate BCALCO status bits to true.
24.6.3 ECB52 Detailed Operation
The control algorithm executes every 10 ms to 50 ms as specified by the ECB52 cycle time (CYC-
TIM) value, independent of the Control Processor (CP) execution period.
The FBM provides up to three redundant measurement inputs as specified by ECB52 parameter
REDOPT. The FBM selects, scales, linearizes, and characterizes the measurement as specified by
the ECB52 configuration data.
24.6.3.1 Controller Cycle Time and Measurement Sampling
ECB52 Key Parameters: CYCTIM, FILTIM, FLTOPT,
CYCTIM, FLTOPT, and FILTIM, allow the cycle time of the controller and the characteristics of
the input filtering to be adjusted for best controller performance when very fast loop times are
required.
The CYCTIM value specifies the cycle time of the controller algorithm in 5 ms increments: 0 =
50 ms, 2 = 10 ms... 10 = 50 ms (1 is not a valid value). If not set, the default value is 0.
Processor power limits the options usable at fast cycles. If the cycle time is too fast for the config-
ured options, the FBM slows down.
10 ms cycle times are possible only for nonredundant inputs without characterizer or square root
conditioning. 15ms cycles can support input signal conditioning or redundancy but not both.
Table 24-9. Status of Critical Parameters
Status Condition
MEAS.OOS = 1 FBM communications failure
MEAS.BAD = 1 FBM communications failure or bad measurement
BCALCO.OOS = 1 FBM communications failure
BCALCO.BAD = 1 FBM communications failure or bad measurement
MA.OOS = 1 FBM communications failure
B0193AX Rev AB 24. DPIDA Controller
756
NOTE
As the controller cycle time is reduced, the precision of the analog conversion is
reduced. See FLTOPT and FLTTIM below.
The FBM converts each analog input sample to a digital value and averages these values over a
sampling time window specified by CYCTIM (see Figure 24-9).
Figure 24-9. Measurement Sampling
At the end of each window when FLTOPT = 0, this average is added to the average from the pre-
vious window to create a final raw measurement value. Thus, the analog conversion averaging is
performed over two sampling windows to provide anti-alias filtering.
At the end of each window when FLTOPT = 1, the digital samples are averaged over a single win-
dow, which provides less filtering.
FLTTIM = 0 sets the sampling window equal to the controller cycle time. This is the optimal set-
ting for almost all cases. FLTTIM ranges from 1 to the value of CYCTIM, and specifies the sam-
pling window in 5 ms increments. Setting FLTTIM less than CYCTIM provides less filtering.
The final averaged value is converted into a raw measurement. The precision of the raw converted
value ranges from 12 bits to 7 to 8 bits as follows:
+ 12 bit precision when the total averaging time is 100 ms using the default settings,
that is, 50 ms sampling window and control cycle (CYCTIM = 0) with anti-alias fil-
tering (FLTTIM= 0 and FLTOPT = 0)
+ 7 to 8 bit precision when the averaging time is 5 ms, that is, FLTTIM = 1 and
FLTOPT = 1.
24.6.3.2 Measurement Processing
Measurement processing provides validation, configurable range scaling, an optional square root
function, and an optional 8-segment characterizer for all active measurement input channels (see
Figure 24-2). The measurement signal is FBM analog input channel 1 when no redundancy is
configured.
CYCTIM
Sampling Window
CYCTIM
Sampling Window
Sampling Window
Sampling Window
Sampling Window
Sampling Window
Time
Final Raw Value
FLTOPT = 1
FLTIM < CYCTIM
FLTOPT = 0
FLTIM < CYCTIM
FLTOPT = 1
FLTOPT = 0
FLTIM = 0 or CYCTIM
24. DPIDA Controller B0193AX Rev AB
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If all configured measurements are Bad while in Auto, the controller goes to Hold and sets the
BAD parameter and MEAS.BAD status.
Measurement Redundancy
ECB52 Key Parameters: REDOPT
DPIDA Key Parameters: MEASn, SELRQ
Redundant measurement signals for the analog input channels are provided by configuring
REDOPT as follows:
0 = channel 1 (no redundancy)
1 = channels 1 and 2
2 = channels 1 to 3
The redundant measurement values are scaled as above and reported to the CP. The CP scales
them to range RI1 and then provides them as MEAS01, MEAS02, and MEAS03. Select status
(SELST) indicates which measurement (1, 2, or 3) is selected for algorithm use.
Measurement Selection
If redundant measurements are configured, the FBM selects the measurement as follows:
+ If there are three good measurements, the FBM uses the median signal.
+ If there are two good measurements, the FBM uses the signal closest to the setpoint.
+ If one or more measurements are bad, the FBM uses the good signal nearest to the
setpoint.
+ Measurement specified by the operator via the SELRQ option, if it is healthy.
Measurement Input Scaling
ECB52 Key Parameters: HMSCAL, LMSCAL
The FBM raw input counts are scaled for the range specified by HMSCAL and LMSCAL before
linearization or characterization. You configure the HMSCAL and LMSCAL parameters to the
physical output range of the measurement device. Table 24-10 shows HMSCAL and LMSCAL
values that are consistent with signal conditioning options for I/A Series analog input blocks, but
you can use any values that are consistent with the measurement device.
The scaled value is then normalized to 0 to 4000 counts before linearization or characterization.
The following equation shows the scaling and normalization calculation for a 4 to 20 mA input
signal:
HMSCAL and LMSCAL values range from 0 to 64000 counts. However, you must enter the
value into the data base as a 16-bit signed integer with the most significant bit (MSB) as the sign
Table 24-10. FBM Analog Input Signal Scaling
Signal Range LMSCAL Count HMSCAL Count
Linear 0 64000
Nominal 0 to 10 V dc 1600 64000
4 to 20 mA dc 12800 64000
Normalized Counts Raw Counts LMSCAL ( )
4000
HMSCAL LMSCAL
---------------------------------------------------------
- =
B0193AX Rev AB 24. DPIDA Controller
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bit. Any value greater than 32767 requires that the sign bit be true (1), indicating a negative num-
ber. For counts of more than 32767, the value to enter is the count minus 65536.
For example, to get a count of 62000, enter -3536.
Sample count values for a 4 to 20 mA input device are listed in Table 24-11.
Measurement Linearization and Characterization
ECB52 Key Parameters: CHAREN, SQRENB, X_nPD, Y_nPD
Two optional conditioning operations can be applied to the selected scaled input:
+ Square root function (SQRENB = 1)
+ Nonlinear characterization function (CHAREN = 1) with up to 8 segments.
If both are applied, the square root is done first. The final result is the controlled variable c used
by the controller and reported to the CP, which scales c to provide the measurement (MEAS)
value.
MEAS = [c (HSCI1 - LSCI1) / 4000] + LSCI1
You define the characterization function by specifying up to 9 pairs of X (input) and Y (output)
values and the number of points. The X (X_nPD) and Y (Y_nPD) values are 4000 scale signed
integers. They are required to be monotonically increasing.
The X-to-Y transformation is done by linear interpolation. If required, the range of the first or last
segment is extended by extrapolation.
FBM17 Measurement Input Bleeder Resistor
If the 0 to 10 V dc input field wiring is disconnected on an FBM17, the measurement input does
not drop immediately to 0 V dc. Instead, there is a slow decay to 0 V dc. It is recommended that
a bleeder resistor be placed across the + and - terminals of each measurement input to quicken the
response. This provides more responsive Bad point detection and redundant measurement selec-
tion when a measurement is Bad. Discharge time can be estimated using the following formula:
t = 9 - 10
-6
R
For more information, refer to Field Connection Diagrams in the System Equipment Installation
document.
Table 24-11. Input Scaling Entry Examples
% Count Value
Entry
(Integer) (Hexadecimal)
0 12800 12800 0x3200
25 25600 25600 0x6400
50 38400 -27136 0x9600
75 51200 -14336 0xC800
100 64000 -1536 0xFA00
62000 65536 3536 =
24. DPIDA Controller B0193AX Rev AB
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24.6.3.3 FBM Analog Output Scaling
ECB52 Key Parameters: HOSCAL, LOSCAL
The FBM control output computed by the algorithm is scaled to the physical output range speci-
fied by the configured high output scale (HOSCAL) and low output scale (LOSCAL) parameters.
You must configure the HOSCAL and LOSCAL parameters to the physical output range required
to drive the output device. Table 24-12 shows HOSCAL and LOSCAL values that are consistent
with signal conditioning options for I/A Series analog output blocks, but you can use any values
that are consistent with the output device.
HOSCAL and LOSCAL values range from 0 to 64000 counts. However, you must enter the val-
ues into the data base as a 16-bit signed integer with the most significant bit (MSB) as the sign
bit. Any value greater than 32767 requires that the sign bit be true (1), indicating a negative num-
ber. You can also enter the values in hexadecimal format. For more information on entering the
values, see Measurement Processing on page 756.
24.6.3.4 Failsafe Action
ECB52 Key Parameters: FS, FSDLAY, FSENAB, FSMMPD, FSOPT, FS5DPD
The Failsafe option (FSOPT) defines the action taken by the DPIDA controller when a Fieldbus
or CP communications failure occurs while the controller is in the Auto or Hold mode. Failsafe is
an FBM hardware state designed to provide I/O security. The FSOPT options are:
0 = do not change mode and control to last setpoint
1 = go to Hold
2 = go to Hold with output set Failsafe
3 = go to Manual
4 = go to Manual with output set Failsafe (similar to MANFS option in PID blocks)
If a transition to Failsafe occurs, the required output value in 4000 scale normalized counts, is
back-calculated and placed in the output m
b,
and the FS parameter and BLKSTA.FS status bit are
set true. The upstream cascade is also opened by setting both the appropriate BCALCO status bits
to true.
If the controller is in Manual when Failsafe occurs, the controller stays in Manual.
When Failsafe clears in Hold, the controller goes to Auto. When Failsafe clears in Manual, the
controller stays in Manual.
FS5DPD specifies the Failsafe value for the controller output. FSMMPD specifies the fall-
back/Hold action for the FBM analog output. Failsafe configuration of the remaining FBM out-
puts is fixed.
FSENAB enables the Failsafe timer and FSDLAY specifies the Failsafe delay time. For more infor-
mation on Failsafe operation, refer to the appropriate Integrated Control Software Concepts docu-
ment (B0700AG or B0193AW).
Table 24-12. FBM Analog Output Signal Scaling
Signal Range LOSCAL Count HOSCAL Count
Linear 0 64000
-0.2 to 10.2 V dc 1600 64000
4.0 to 20 mA dc 12800 64000
B0193AX Rev AB 24. DPIDA Controller
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Failsafe Output Scaling
FS5DPD specifies the fallback value for the controller output. The value represents the D/A raw
count value and must be related to the intended signal conditioning. For example, if this output is
going to a 4 to 20 ma device (raw count range: 12800 to 64000), then FS5DPD must be within
that range.
The formula for determining the count value is:
Example:
For a 4 to 20 mA device, determine the count for a fallback value of 25 percent of full scale.
Fallback values range from 0 to 64000 counts. However, you must enter the value into the data
base as a 16-bit signed integer with the most significant bit (MSB) as the sign bit. Any value
greater than 32767 requires that the sign bit be true (1), indicating a negative number. You can
also enter the value in hexadecimal format. For more information on entering the value, see
Measurement Processing on page 756.
24.6.3.5 FBM04/FBM204 I/O Channels
The FBM04/FBM204 I/O channels assignments are listed in Table 24-13:
24.6.3.6 FBM17/FBM227 I/O Channels and Operators Panel
ECB52 Key Parameters: PNLOPT, INVDFI
The FBM17/FBM227 with DPIDA software supports a local operators panel (which can be sup-
plied by Foxboro Deutschland) with status indicator lights (LEDs), 0 to 100% meter display of
the output, Auto/Manual (A/M) toggle key, and keys for ramping the output up or down in Man-
ual (see Figure 24-10).
Table 24-13. FBM04/FBM204 Channel Assignments
Channel Description Range Assignment
1 Analog input 0 to 20 mA dc Measurement 1
2 Analog input 0 to 20 mA dc Measurement 2
3 Analog input 0 to 20 mA dc Measurement 3
4 Analog input 0 to 20 mA dc Unavailable to user
5 Analog output 0 to 20 mA dc Control output
6 Analog output 0 to 20 mA dc Unavailable to user
7 Analog output 0 to 20 mA dc Unavailable to user
8 Analog output 0 to 20 mA dc Unavailable to user
Count Value
Eng Value Low Scale
High Scale Low Scale
--------------------------------------------------------
Span offset counts + - =
Count Value
25 0
100 0
------------------
64000 12800 ( ) 12800 25600 = + - =
24. DPIDA Controller B0193AX Rev AB
761
Figure 24-10. FBM17/FBM227 (DPIDA) Local Operators Panel Configuration
When PNLOPT is configured true, you can use a a local operators panel to switch the controller
algorithm in the FBM to Manual and then ramp the controller analog output. When PNLOPT is
true, the panel digital outputs are written to the required channels. Panel support requires specific
Failsafe behavior of digital outputs. These are set during initialization.
The user enables the panel by setting PNLOPT to true. If PNLOPT is configured false, the FBM
reads and reports only the field device fail input. If INVDFI is set true, the FBM inverts the
device fail input.
FBM17/FBM227
Analog Input 1
Analog Output 1
Analog Output 2
Digital Output 4
Measurement
Output
FBM Fail
Auto
Manual
Local Operators Panel*
Digital Display Meter
Digital Output 1
CP Fail
LED
Key
Digital Input 1
Digital Input 2
Digital Input 3
Digital Input 4
Ramp Up
Ramp Down
Auto/Manual Toggle
*Panel supplied by Foxboro Deutschland
Device Fail
B0193AX Rev AB 24. DPIDA Controller
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If the panel is present, the FBM reads and processes the keys. The FBM monitors the A/M key for
transitions to detect A/M transfer requests. If the controller is switched to Manual by any means,
the FBM processes the ramp keys. While ramping is active, the FBM rejects write requests from
the CP to change the analog output.
For the up and down ramp keys, the initial ramp rate is one count per cycle (0.025%). If the key
is held down, the rate accelerates until a maximum rate of 8% per second is reached in about two
seconds.
CP Failure
The CP fail output is set to light an LED on the panel when the:
+ CP communications has timed out
+ Controller is not initialized for Auto control.
This LED indicates that the operator should use the panel to control the analog output. Opera-
tionally, it means that updated setpoints are not available for Auto control.
If the controller is not initialized, it is in Manual and the A/M toggle key is disabled.
If CP communication fails, the control algorithm is automatically switched to Manual if the Fail-
safe option is appropriately set.
FBM Failure
The FBM fail analog output (Channel 6) goes below zero volts which disables the panel keys and
lights a panel LED when the:
+ FBM is powered up
+ FBM is off-line
+ FBM watchdog timer times out
+ FBM software traps on a fault or error.
During normal operation of the controller software, this analog output is set to maximum voltage
(10.24 V dc).
The FBM17/FBM227 I/O channels assignments are listed in Table 24-14:
Table 24-14. FBM17/FBM227 Channel Assignments
Channel Description Range Assignment
1 Analog input 0 to 10 V dc Measurement 1
2 Analog input 0 to 10 V dc Measurement 2
3 Analog input 0 to 10 V dc Measurement 3
4 Analog input 0 to 10 V dc Unavailable to user
5 Analog output 0 to 10 V dc Control output
6 Analog output 0 to 10 V dc FBM Fail Indicator
7 Digital input Open to close Ramp up output
8 Digital input Open to close Ramp down output
9 Digital input Open to close Auto/Manual toggle
10 Digital input Open to close Device fail
11 Digital output Open to close Unavailable to user
24. DPIDA Controller B0193AX Rev AB
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24.6.3.7 FBM22 I/O Channels and Auto/Manual Station
The FBM22 with DPIDA software supports the I/A Series Auto/Manual Station with status indi-
cator lights (LEDs), 0 to 100% meter display of the output, Auto/Manual (A/M) toggle key, and
keys for ramping the control output up or down in Local Manual.
When the A/M key is toggled to Auto, the controller goes to Remote Manual, not Auto; operator
action from a workstation is required to transfer the controller to Auto.
If the A/M station is present, the FBM reads and processes the keys. The FBM monitors the A/M
key for transitions to detect Remote/Manual transfer requests. If the controller is in Local Man-
ual, the FBM processes the ramp keys.
The standard ramp rate is 0 to 20 seconds for full scale. The fast rate is 0 to 5 seconds for full
scale. The FAST key selects the fast rate of the up or down key.
NOTE
Output ramping from the A/M Station is actually smooth, but the meter display
tends to overshoot during ramping and data entry.
The FBM22 I/O channel assignments are listed in Table 24-15:
24.7 Application Example
The DPIDA block can be used in a control scheme for compressor surge control (see
Figure 24-11). In these applications, centrifugal and axial compressors are used to provide com-
pression of process gases or for utility air. Traditionally, surge control schemes have been stand-
alone systems, separate from the distributed control systems. This is due primarily to concern
regarding the application of shared control to surge control, which may require a high speed of
response in some critical applications.
Anti-surge control schemes, when applied to centrifugal or axial compressors, allow safe operation
of the compressor. The primary need is for protection of the compressors from surging of flow
through the machine.
12 Digital output Open to close Unavailable to user
13 Digital output Open to close CP Fail
14 Digital output Open to close Auto/Manual Indicator
Table 24-15. FBM22 Channel Assignments
Channel Description Range Assignment
2 Analog output 0 to 20 mA dc Control output
7 Analog input 0 to 20 mA dc Measurement
Table 24-14. FBM17/FBM227 Channel Assignments (Continued)
Channel Description Range Assignment
B0193AX Rev AB 24. DPIDA Controller
764
Figure 24-11. Application Diagram
Surge is an unstable operating condition that takes place in centrifugal or axial compressors when
the flow through the machine decreases below a critical value. This results in a sudden reversal in
flow, causing the discharge line pressure to drop. When discharge line pressure drops sufficiently,
flow through the compressor is reestablished. The cycle continues and appears as an oscillation of
flow through the compressor.
Surge damages a compressor sometimes seriously. It may result in bent shafts, cracked housings,
or damaged bearings and impellers, sometimes accompanied by injury to personnel and damage
to buildings and associated process equipment.
Adapter
CALC
DPIDA
User Set Ratio
RATIO CHARC MATH
AIN AIN
ECB
Period = 0.5 s for all blocks
CP
ECB52
MEAS
SPT
LOLIM
PBAND
INT
OUT
MEAS
PID
Algorithm
Output
FBM
Cycle Time = 25 ms
PT
Outlet
Recycle
Valve
Compressor
PT
FT
Inlet
24. DPIDA Controller B0193AX Rev AB
765
The goal of an anti-surge control scheme is to calculate the surge point and the minimum safe
flow at the compressor inlet. The slope of the control line (see Figure 24-12) represents the setting
of the ratio between the inlet differential pressure and the pressure rise across the compressor.
Figure 24-12. Surge Line and Control Line Curves
In the anti-surge control scheme shown in Figure 24-11, two gauge pressure transmitters are used
to measure the suction and discharge pressures. The two pressures are subtracted in a MATH
(mathematics) block to determine the pressure rise across the machine. The pressure rise is soft-
ware-connected to a CHARC (characterizer) block. The output of the CHARC block is the surge
point. The surge point is software-connected to a RATIO block. The output of this block is the
control point, that is, the minimum flow through the compressor for a given pressure rise. The
ratio is set by the operator, and is normally provided with limits to prevent the operator from set-
ting a value which could result in a control point too close to the surge point.
The output of the RATIO block is connected to the remote setpoint RSP of a DPIDA block that
is configured for the PI control mode. This setpoint is fed to the control algorithm in the FBM.
The measurement is from the differential pressure across the compressor inlet orifice as measured
by the flow transmitter. The control output of the FBM is connected, through hardware, to the
recycle valve. This valve is closed when the derivative compensated measurement is less than the
setpoint, but it opens when the control line of Figure 24-11 is reached. The adapter CALC block
and DPIDA block perform asymmetric functions that allow the valve to open fast and limit the
closing rate of the valve.
The control blocks in the CP40 are all configured to run every 0.5 s. The control algorithm in the
FBM is configured to run every 25 ms.
Flow
Pressure
Surge Line
Control Line
B0193AX Rev AB 24. DPIDA Controller
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NOTE
This application example is not a complete control strategy for compressor surge
control. You must contact Invensys to design a complete control strategy for your
application.
24.7.1 DPIDA Block Parameter Configuration
For the example in Figure 24-11, the user configures the following DPIDA block key parameters
as shown below for a 4 to 20 mA measurement input and 4 to 20 mA control output.
PERIOD = 1
IOM_ID = PLANT03:CMPR07_42
DEV_ID = REC007
HSCI1 = 1000.0
LSCI1 = 0.0
EI1 = SCFM
RSP = PLANT03:RATIO.OUT
MODOPT = 4
PBAND = (connected)
INT = (connected)
HSCO1 = 100.0
LSCO1 = 0.0
EO1 = %
HOLIM = 100.0
LOLIM = (connected)
MA = 1
INITMA = 1
NOTE
The above is not a complete list of required parameters and is not specific to a par-
ticular surge control application.
24.7.2 ECB52 Block Parameter Configuration
For the example in Figure 24-11, the user configures the following ECB52 block key parameters
as shown below:
CYCTIM = 5
DEV_ID = REC007
FLTOPT = 0
FLTTIM = 0
FSOPT = 4
24. DPIDA Controller B0193AX Rev AB
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HMSCAL = 0xFA00
HOSCAL = 0xFA00
HWTYPE = 17
LMSCAL = 0x3200
LOSCAL = 0x3200
PERIOD = 1
SQRENB = 1
NOTE
The above is not a complete list of required parameters and is not specific to a par-
ticular surge control application.
B0193AX Rev AB 24. DPIDA Controller
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769
25. DSI Display Station Interface
Block
This chapter covers the Display Station Interface Block, or DSI, its parameters and detailed
operations.
25.1 Overview
The Display Station Interface block, DSI, in conjunction with Equipment Control Block 14
(ECB14), provides the interface between each Panel Display Station and the compounds and
blocks that actualize the control strategy.
25.1.1 I/O Diagram
Figure 25-1. DSI Block I/O Diagram
25.2 Parameters
Table 25-1. DSI Block Parameters
Name Description Type Accessibility Default Units/Range
Configurable Parameters
INPUTS
NAME block name string no-con/no-set blank 1 to 12 chars
TYPE block type integer no-con/no-set 40 DSI
DESCRP descriptor string no-con/no-set blank 1 to 32 chars
PERIOD block sample time integer no-con/no-set 1 1 to 13
PHASE block phase number integer no-con/no-set 0 ---
LOOPID loopid string no-con/set blank 1 to 32 characters
IOM_ID FBM reference string no-con/no-set blank ---
COL_1 to COL_3 column 1 to 3 value real con/set 0.0 RI1
HSCI1 to HSCI3 high scale 1 to 3 real no-con/no-set 100.0 specifiable
LSCI1 to LSCI3 low scale 1 to 3 real no-con/no-set 0.0 specifiable
DELTI1 to DELTI3 change delta 1 to 3 real no-con/no-set 1.0 percent
DSI
Block
Column 1 Value
Column 2 Value
Column 3 Value
Station L/R State
Column 1 Value
Column 2 Value
Column 3 Value
Station L/R State
from Control Block to Display Station
B0193AX Rev AB 25. DSI Display Station Interface Block
770
25.2.1 Parameter Definitions
ACHNGE Alternate Change is an integer output which is incremented each time a
block parameter is changed via a Set command.
AM_SET Auto/Manual is a boolean set from the default display that specifies the
desired state of Auto/Manual:
0 = Manual
1 = Auto.
AM_STA Auto/Manual is a boolean input from a control strategy that specifies the
desired state of Auto/Manual:
0 = Manual
1 = Auto.
EI1 to EI3 eng units input string no-con/no-set % specifiable
LR_STA LR value boolean con/set 0 0 to 1
Non-Configurable Parameters
OUTPUTS
BLKSTA block status pack_l con/no-set 0 bit map
DATA STORES
ACHNGE alternate change integer con/no-set 0 -32768 to 32767
AM_SET auto/manual set boolean con/set 0 0 to1
AM_STA auto/manual station boolean con/set 0 0 to1
COL_1S to COL_3S column 1 to 3 sets real no-con/set 0.0 RI1
DEFINE no config errors boolean no-con/no-set 1 0 to 1
DEV_ID FBM letterbug char[6] no-con/no-set blank 1 to 6 chars
ERCODE config error string no-con/no-set 0 1 to 43 chars
LR local/remote boolean con/set 0 0 to 1
LOCKID lock identifier string no-con/no-set blank 8 to 13 chars
LOCKRQ lock request boolean no-con/set 0 0 to 1
MA manual/auto boolean con/set 0 0 to 1
RI1 to RI3 eng range input real[3] no-con/no-set 100,0,1 specifiable
WP_SET workstation set boolean no-con/set 0 0 to 1
WP_STA workstation boolean con/set 0 0 to 1
Table 25-1. DSI Block Parameters (Continued)
Name Description Type Accessibility Default Units/Range
25. DSI Display Station Interface Block B0193AX Rev AB
771
BLKSTA Block Status is a 32-bit output, bit-mapped to indicate the blocks opera-
tional states. For the DSI block, only the following bits are used:
* Bit 0 is the least significant, low order bit.
COL_1 to COL_3
Column 1 to 3 is a real input from the control strategy to the to each of
the column indicators on the default display.
COL_1S to COL_3S
Column 1 to 3 is a real output set from the default display column indica-
tors.
DEFINE Define is a data store which indicates the presence or absence of configura-
tion errors. The default is 1 (no configuration errors). When the block ini-
tializes, DEFINE is set to 0 if any configured parameters fail validation
testing. In that case, no further processing of the block occurs. To return
DEFINE to a true value, correct all configuration errors and re-install the
block.
DELTI1 to DELTI3
Change Delta for Input Ranges 1 through 3 are a real values that define
the minimum percent of the input range that triggers change driven con-
nections for parameters in the range of RI1 through RI3. The default
value is 1.
Entering a 1 causes the Object Manager to recognize and respond to a
change of 1 percent of the full error range. If communication is within the
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
B
9
B
1
0
B
1
1
B
1
2
B
1
3
B
1
4
B
1
5
B
1
6
B
1
7
B
1
8
B
1
9
B
2
0
B
2
1
B
2
2
B
2
3
B
2
4
B
2
5
B
2
6
B
2
7
B
2
8
B
2
9
B
3
0
B
3
1
B
3
2
W
L
C
K
O
N
U
D
E
F
B
A
D
M
A
L
R
Bit
Number*
(0 to 31) Name Description When True
Boolean
Connection
(B32 to B1)
10 LR Local(= false)/Remote(= true) BLKSTA.B22
11 MA Manual(= false)/Auto(= true) BLKSTA.B21
12 BAD Bad I/O (I/O Blocks only -
block in BAD state)
BLKSTA.B20
14 UDEF Undefined BLKSTA.B18
15 ON Compound On BLKSTA.B17
20 WLCK Workstation Lock BLKSTA.B12
B0193AX Rev AB 25. DSI Display Station Interface Block
772
same CP that contains the blocks compound, change deltas have no
effect.
Refer to Peer-to-Peer Connections of Real-Type Block Inputs on
page 23 for details on how the I/A Series software affects the change delta
percentage during operation.
DESCRP Description is a user-defined string of up to 32 characters that describe
the blocks function (for example, PLT 3 FURNACE 2 HEATER
CONTROL) .
DEV_ID Device Identifier is a character array that specifies the 6-character letter-
bug identifier of the connected FBM or FBC. DEV_ID differs from
IOM_ID in that it is of character array rather than string type, and does
not allow the use of the ECB NAME parameter or ECB pathname in
specifying the connected FBM or FBC.
EI1 to EI3 Engineering Units for Input Ranges 1 through 3, defined by the parame-
ters HSCI1 to HSCI3, LSCI1 to LSCI3, and DELTI1 to DELTI3, pro-
vide the engineering units text for the values defined by Input Ranges 1
through 8. Deg F or pH are typical entries.
ERCODE Error Code is a string data store which indicates the type of configuration
error or warning encountered. The error situations cause the blocks
DEFINE parameter to be set false, but not the warning situations. Valida-
tion of configuration errors does not proceed past the first error encoun-
tered by the block logic. The block detailed display shows the ERCODE
on the primary page, if it is not null. For the DSI block, the following list
specifies the possible values of ERCODE, and the significance of each
value in this block:
Message Value
W43 INVALID PERIOD/
PHASE COMBINATION
PHASE does not exist for given block
PERIOD, or block PERIOD not
compatible with compound
PERIOD.
W44 INVALID
ENGINEERING RANGE
High range value is less than or equal
to low range value.
W46 INVALID INPUT
CONNECTION
The source parameter specified in the
input connection cannot be found in
the source block, or the source
parameter is not connectable, or an
invalid boolean extension connection
has been configured.
W48 INVALID BLOCK
OPTION
The configured value of a block
option is illegal.
W53 INVALID
PARAMETER VALUE
A parameter value is not in the accept-
able range.
25. DSI Display Station Interface Block B0193AX Rev AB
773
HSCI1 to HSCI3 High Scale for Input Ranges 1 through 3 are real values that define the
upper limit of the measurement ranges. EI1 to EI3 define the units. Make
the range and units consistent with the measurement source. A typical
value is 100 (percent).
IOM_ID Fieldbus Module Identifier is a configurable string that specifies the FBM
or FBC to which the block is connected.
IOM_ID has the form CompoundName:BlockName, where Compound-
Name is the 1-12 character name of the local compound containing the
ECB, and BlockName is the 1-12 character block name of the ECB.
If the compound containing the ECB is the CPletterbug_ECB compound
where CPletterbug is the station letterbug of the CP, the CompoundName
may be omitted from the IOM_ID configuration. In this case, the 1-12
character ECB block name is sufficient.
LOCKID Lock Identifier is a string identifying the workstation which has locked
access to the block via a successful setting of LOCKRQ. LOCKID has the
format LETTERBUG:DEVNAME, where LETTERBUG is the 6-char-
acter letterbug of the workstation and DEVNAME is the 1 to 6 character
logical device name of the Display Manager task.
LOCKRQ Lock Request is a boolean input which can be set true or false only by a
SETVAL command from the LOCK U/L toggle key on workstation dis-
plays. When LOCKRQ is set true in this fashion a workstation identifier
accompanying the SETVAL command is entered into the LOCKID
parameter of the block. Thereafter, set requests to any of the blocks
parameters are honored (subject to the usual access rules) only from the
workstation whose identifier matches the contents of LOCKID.
LOCKRQ can be set false by any workstation at any time, whereupon a
new LOCKRQ is accepted, and a new ownership workstation identifier
written to LOCKID.
LOOPID Loop Identifier is a configurable string of up to 32 characters which iden-
tifies the loop or process with which the block is associated. It is displayed
on the detail display of the block, immediately below the faceplate.
LR Local/Remote is an input that selects the setpoint source (0 = false = Local;
1 = true = Remote). If LR is set to Remote, the source of the setpoint value
is the real input parameter RSP. When LR is set to Local, there are two
possible sources for the setpoint: (a) MEAS or (b) a user settable input.
The choice is based on the conditions of STRKOP and MA, as described
under STRKOP.
W58 INSTALL ERROR;
DELETE/UNDELETE
BLOCK
A Database Installer error has
occurred.
Message Value
B0193AX Rev AB 25. DSI Display Station Interface Block
774
LR_STA Local/Remote input is displayed as the LR indicator on the DSI display
station.
25. DSI Display Station Interface Block B0193AX Rev AB
775
LSCI1 to LSCI3 Low Scale for Input Ranges 1 through 3 are real values that define the
lower limit of the measurement ranges. A typical value is 0 (percent). EI1
to EI3 define the units. Make the range and units consistent with those of
the measurement source.
MA Manual Auto is an input that controls the Manual/Automatic operating
state (0 = false = Manual; 1 = true = Auto). In Auto, given the measure-
ment value, the block computes the output according to its specific algo-
rithm. The block automatically limits the output to the output range
specified between LSCO1 and HSCO1, for analog blocks. In Manual, the
algorithm is not performed, and the output is unsecured. An external pro-
gram can then set the output to a desired value.
NAME Name is a user-defined string of up to 12 characters used to access the
block and its parameters.
PERIOD Period is an indexed input that dictates the blocks execution time base
and allowable PHASE values. For stations other than Integrators and
Gateways, PERIOD values range from 0 to 13 and map to the following
period time lengths. (Integrator and Gateway blocks have different period
values than shown here.)
* If the BPC is 0.2 sec. this period is treated internally as 0.6 sec., but the
PERIOD parameter remains 1.
** If the BPC is 2.0 sec. this period is treated internally as 6.0 sec., but the
PERIOD parameter remains 10.
*** If the BPC is 0.5 sec. this period is treated internally as 0.5 sec., but
the PERIOD parameter remains 11.
**** If the BPC is not 2.0 sec. this period is treated internally as 5.0 sec.,
but the PERIOD parameter remains 12.
***** Available in CP40 and CP40B.
PHASE Phase is an integer input that causes the block to execute at a specific BPC
within the time determined by the PERIOD. For instance, a block with
PERIOD of 3 (2.0 sec) can execute within the first, second, third, or
fourth BPC of the 2-second time period, assuming the BPC of the Con-
trol Processor is 0.5 sec. Refer to the appropriate Integrated Control Soft-
ware Concepts document (B0700AG or B0193AW).
Period Length Period Length
0 0.1 sec 7 10 min
1 0.5 sec* 8 60 min
2 1.0 sec 9 0.2 sec
3 2.0 sec 10 5.0 sec**
4 10 sec 11 0.6 sec***
5 30 sec 12 6.0 sec****
6 1 min 13 0.05 sec*****
B0193AX Rev AB 25. DSI Display Station Interface Block
776
RI1 to RI3 Range Input is an array of real values that specify the high and low engi-
neering scale and change delta of a particular real input. For a given block,
it also forms an association with a group of real input parameters that have
the same designated range and change delta.
TYPE When you enter DSI or select DSI from the block type list under
Show, an identifying integer is created specifying this block type.
WP_SET Workstation Processor is a boolean set from the default display.
WP_STA Workstation Processor is a boolean input from a control strategy.
25.3 Detailed Operation
The DSI Block, in conjunction with the Equipment Control Block 14 (ECB14), provides the
software interface between the I/A Series Panel Display Station and the Control and
I/O Database.
Physically the Display Station (DS) connects to a Panel Display Processor 10 (DP10), a CP30, a
CP40, or a CP40B, via the Fieldbus. The DP10 accommodates up to 24 Display Stations. The
DP10 uses the standard CP10 hardware and software (except for the PLB control block).
The DSI blocks which reside in the DP10, CP30, CP40, or CP40B pass the control variables
from compounds resident in the control processors to the Display Stations indicators via the
ECB14 assigned to that specific Display Station.
Figure 25-2. System with Display Station Capability
Control
Processor
DISPLAY
PROCESSOR 10
CONTROL
PROCESSOR 30
FIELDBUS
FBM001 FBM002 FBM032
DP1S01 DP1S02 DP1S24
DP1S01 DP1S02 DP1S24
FIELDBUS
FIELDBUS
up to 48 FBMs (CP10)
up to 24 Display Stations
up to 24 Display Stations
N
O
E
D
B
U
S
up to 64 FBMs (CP30,CP40
40, or 40B
See DP10, CP30,
CP40 or CP40B
and CP40B)
Figure 20-3
25. DSI Display Station Interface Block B0193AX Rev AB
777
Figure 25-3. DP10, CP30, CP40, or CP40B
The Display Processor, CP30, CP40 or CP40B is the control processor in this scheme and it over-
sees the Fieldbus.
The Display Station is equivalent to an FBM, and is occasionally referred to as hardware type 28.
The Station Health display, however, always shows the Display Station as DS (not FBM_28). The
DS uses software type 14 (which is ECB14).
The DSI block has four parameters that have a direct relation to the three column indicators and
the R/L indicator. These four parameters which enable the transfer of process data to the display
station are:
+ COL_1
+ COL_2
+ COL_3
+ LR_STA.
When the DSI block is processed, it converts the value it receives from the COL_1 source into
counts (an integer value between -16384 and 16383) based on the range defined by LSCI1 and
HSCI1. The resulting count value is then sent to the Display Station via the ECB14 block
assigned to that DS.
The DS uses the ECB14 parameters LRV1 and URV1 (lower range value and upper range value
for column 1) as well as parameter DECPL1 (decimal place for column 1) to convert the counts-
value to the representation on the column 1 display and the actual number shown in digits on the
Display Station.
In the same processing cycle the Display Station is checked on a change-driven basis for new ramp
values and a new L/R setting.
N
O
D
E
B
U
S
DSI Block
DP1S01 DP1S23
DP1S02 DP1S24
ECB14
for DP1S01
up to 24 DSs
FIELDBUS
to/from
other CPs
PANEL DISPLAY PROCESSOR, CP30, CP40, or CP40B DISPLAY STATIONS
to/from
other CPs
DSI Block
for DP1S02
DSI Block
for DP1S24
ECB14
ECB14
B0193AX Rev AB 25. DSI Display Station Interface Block
778
The ramp value for column 1 undergoes a conversion that is the reverse of the above, before it is
used in Object Manager setval call on the source of the COL_1 parameter.
The Display Station sends the new settings to the control strategy parameters. From there the
control blocks relay the settings back to the DSI block through the linkages. Finally, the DSI
sends the value back to the DS where the value is displayed.
Ramp values and R/L key changes are written to parameters LR, COL_1S, COL_2S, and
COL_3S either by the DS through Fieldbus handling or by another source through the Object
Manager and then communicated through one of the linkages from the parameter to be shown to
the corresponding COL_n or LR_STA parameter. These values are communicated in reverse
direction through the linkage by means of Object Manager setval-commands by the block algo-
rithm.
If the source parameter of the linkage cannot be set for some reason, for example, because it is the
sink of another linkage or it is an output parameter of a block that is in automatic mode, then this
condition is ignored and the parameter is not set.
It is possible to physically attach a Auto/Manual Station (AMS) to the Display Station. However,
the AMS is supported by a separate control block and an FBM22 that must be on a separate field-
bus. The absence or presence of the AMS and its peripheral components have no effect on the
DSI block.
779
26. DTIME Dead Time
Compensator Block
This chapter covers the Dead Time Compensator Block, or DTIME, its features, parameters
and detailed operations.
26.1 Overview
The Dead Time Compensator block, DTIME, simulates the dynamic effects of pure delay, trans-
port lag, or distance-velocity lag, which are characteristic of energy or mass transportation in a
physical system.
26.1.1 I/O Diagram
Figure 26-1. DTIME Block I/O Diagram
26.2 Features
Features are:
+ Manual/Auto control of the outputs, which can be initiated by either a host process or
another block
+ True dynamic variable deadtime adjustment
+ Follow mode, in which the output tracks the measurement
+ Hold mode, in which the output remains unchanged.
+ Configurable bucket utilization
+ Use of the DTIME block for short-term data collection.
Options are:
+ PROPT, Error Propagation option.
+ DTOPT, Dead Time Option, disables the calculation of the running average in the
DTIME blocks input, and the linear interpolation in the blocks output.
+ NUMBKT, Number of Buckets, specifies the number of buckets for storing interme-
diate deadtime values.
Running Average Disable
Manual/Auto
Measurement
Deadtime
Follow
Output
Block Status
DTIME
BLOCK
Hold
Data Collection Flag
B0193AX Rev AB 26. DTIME Dead Time Compensator Block
780
+ INITMA, Initialize Manual/Auto, specifies the desired state of the MA input during
initialization.
+ CEOPT, Control Error Option.
26.3 Parameters
Table 26-1. DTIME Block Parameters
Name Description Type Accessibility Default Units/Range
Configurable Parameters
INPUTS
NAME block name string no-con/no-set blank 1 to 12 chars
TYPE block type integer no-con/no-set 17 DTIME
DESCRP descriptor string no-con/no-set blank 1 to 32 chars
PERIOD block sample time short no-con/no-set 1 0 to 13
PHASE block phase number integer no-con/no-set 0 ---
LOOPID loopid string no-con/set blank 1 to 32 chars
MEAS process input real con/set 0.0 RI1
HSCI1 high scale in 1 real no-con/no-set 100.0 specifiable
LSCI1 low scale in 1 real no-con/no-set 0.0 specifiable
DELTI1 change delta in 1 real no-con/no-set 1.0 percent
EI1 eng units input string no-con/no-set % specifiable
PROPT propagate error boolean no-con/no-set 0 0 to 1
DTOPT dead time option boolean no-con/no-set 0 0 to 1
DT dead time real con/set 0.0 [0..]minutes
NUMBKT number of buckets short no-con/no-set 10 1 to 10
HSCO1 high scale out 1 real no-con/no-set 100.0 specifiable
LSCO1 low scale out 1 real no-con/no-set 0.0 specifiable
DELTO1 change delta out 1 real no-con/no-set 1.0 percent
EO1 eng unit output string no-con/no-set % specifiable
MA manual/auto boolean con/set 0 0 to 1
INITMA initialize MA short no-con/no-set 1 [0|1|2]
FOLLOW follow mode boolean con/set 0 0 to 1
HOLD hold mode boolean con/set 0 0 to 1
CEOPT control error option short no-con/no-set 1 0 to 2
Non-Configurable Parameters
OUTPUTS
BKT_1 to BKT_10 bucket #1 to #10 real con/no-set 0.0 RO1
BLKSTA block status pack_l con/no-set 0 bit map
DTFLAG deadtime flag integer con/no-set 0 0 to 32767
OUT output real con/no-set 0.0 RO1
DATA STORES
ACHNGE alternate change integer con/no-set 0 -32768 to 32767
DEFINE no config errors boolean no-con/no-set 1 0 to 1
DTCYCL dead time in cycles real no-con/no-set 1.0 ---
26. DTIME Dead Time Compensator Block B0193AX Rev AB
781
26.3.1 Parameter Definitions
ACHNGE Alternate Change is an integer output which is incremented each time a
block parameter is changed via a Set command.
BKT_1 to BKT_n Buckets 1 through n contain intermediate values calculated and stored by
the DTIME block algorithm. Bucket 1 is the oldest value, and Bucket n
the most recent value (calculated over the most recent shift time period),
where n is the value of NUMBKT.
BLKSTA Block Status is a 32-bit output, bit-mapped to indicate the blocks opera-
tional states. For the DTIME block, only the following bits are used:
* Bit 0 is the least significant, low order bit.
ERCODE config error string no-con/no-set 0 1 to 43 chars
LOCKID lock identifier string no-con/no-set blank 8 to 13 chars
LOCKRQ lock request boolean no-con/set 0 0 to 1
OWNER owner name string no-con/set blank 1 to 32 chars
PERTIM period time real no-con/no-set 0.1 ---
RI1 eng range input real[3] no-con/no-set 100,0,1 specifiable
RO1 eng range output real[3] no-con/no-set 100,0,1 specifiable
Table 26-1. DTIME Block Parameters (Continued)
Name Description Type Accessibility Default Units/Range
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
B
9
B
1
0
B
1
1
B
1
2
B
1
3
B
1
4
B
1
5
B
1
6
B
1
7
B
1
8
B
1
9
B
2
0
B
2
1
B
2
2
B
2
3
B
2
4
B
2
5
B
2
6
B
2
7
B
2
8
B
2
9
B
3
0
B
3
1
B
3
2
W
L
C
K
O
N
U
D
E
F
M
A
H
L
D
F
O
L
Bit
Number*
(0 to 31) Name Description When True
Boolean
Connection
(B32 to B1)
4 FOL Follow BLKSTA.B28
7 HLD Holding BLKSTA.B25
11 MA Manual(= false)/Auto(= true) BLKSTA.B21
14 UDEF Undefined BLKSTA.B18
15 ON Compound On BLKSTA.B17
20 WLCK Workstation Lock BLKSTA.B12
B0193AX Rev AB 26. DTIME Dead Time Compensator Block
782
CEOPT Control Error Option is a short integer that specifies how the block
responds to the MEAS and BCALCI inputs when either of those inputs is
in error. To provide backward compatibility, CEOPT defaults to 1.
CEOPT has a range of 0 to 2 where:
CEOPT is independent of the propagate error option, PROPT, and does
not affect the external logical input, HOLD. The HOLD input, when
true, still drives the block into the Hold state whenever the block is in
Auto (and MBADOP is false).
DEFINE Define is a data store which indicates the presence or absence of configura-
tion errors. The default is 1 (no configuration errors). When the block ini-
tializes, DEFINE is set to 0 if any configured parameters fail validation
testing. In that case, no further processing of the block occurs. To return
DEFINE to a true value, correct all configuration errors and re-install the
block.
DELTI1 Change Delta for Input Range 1 is a real value that defines the minimum
percent of the input range that triggers change driven connections for
parameters in the range of RI1. The default value is 1.
Entering a 1 causes the Object Manager to recognize and respond to a
change of 1 percent of the full error range. If communication is within the
same CP that contains the blocks compound, change deltas have no
effect.
Refer to Peer-to-Peer Connections of Real-Type Block Inputs on
page 23 for details on how the I/A Series software affects the change delta
percentage during operation.
DELTO1 Change Delta for Output Range 1 is presently unused.
DESCRP Description is a user-defined string of up to 32 characters that describe the
blocks function (for example, PLT 3 FURNACE 2 HEATER CON-
TROL).
DT Dead Time is the length of the delay, in minutes, before the measurement
appears at the output. You can configure this input as a constant or con-
nect it to a block to provide varying delay times, as long as the DT value
remains equal to or greater than the block period.
0 = The block takes no implicit Hold action when it detects a con-
trol error.
1 = The block goes to the Hold state if, while MBADOP is false,
either MEAS or BCALCI: (a) has its BAD status bit set true; (b)
has its Out-of-Service status bit set true; (c) is experiencing
peer-to-peer path failure.
2 = The block goes to the Hold state if, while MBADOP is false,
either MEAS or BCALCI meets any of the conditions described
for CEOPT = 1, or if MEAS has its ERROR status bit set true.
26. DTIME Dead Time Compensator Block B0193AX Rev AB
783
DTCYCL Dead Time Cycles is a real parameter representing the deadtime of the
block calculated in block cycles.
DTFLAG Deadtime Flag is incremented every shift time period in the DTIME
block.
DTOPT Dead Time Option disables the calculation of the running average in the
DTIME blocks input, and the linear interpolation in the blocks output.
EI1 Engineering Units for Input Range 1, as defined by the parameters
HSCI1, LSCI1, and DELTI1, provides the engineering units text for the
values defined by Input Range 1. Deg F or pH are typical entries.
EO1 Engineering Units for Output Range 1, defined by the parameters
HSCO1, LSCO1, and DELTO1, provides the engineering units text for
the values defined by Output Range 1. Deg F or pH are typical
entries. Make the units for the Output Range (EO1) consistent with the
units of Input Range 1 (EI1).
ERCODE Error Code is a string data store which indicates the type of configuration
error or warning encountered. The error situations cause the blocks
DEFINE parameter to be set false, but not the warning situations. Valida-
tion of configuration errors does not proceed past the first error encoun-
tered by the block logic. The block detailed display shows the ERCODE
on the primary page, if it is not null. For the DTIME block, the following
list specifies the possible values of ERCODE, and the significance of each
value in this block:
Message Value
W43 INVALID PERIOD/
PHASE COMBINATION
PHASE does not exist for given block
PERIOD, or block PERIOD not
compatible with compound PERIOD.
W44 INVALID
ENGINEERING RANGE
High range value is less than or equal
to low range value.
W46 INVALID INPUT
CONNECTION
The source parameter specified in the
input connection cannot be found in
the source block, or the source
parameter is not connectable, or an
invalid boolean extension connection
has been configured.
W48 INVALID BLOCK
OPTION
The configured value of a block option
is illegal.
W53 INVALID
PARAMETERVALUE
A parameter value is not in the accept-
able range.
W58 INSTALL ERROR;
DELETE/UNDELETE
BLOCK
A Database Installer error has
occurred.
B0193AX Rev AB 26. DTIME Dead Time Compensator Block
784
FOLLOW Follow is a boolean input. When true, FOLLOW forces the block into the
Follow substate of Auto. In this substate, the output follows the input
MEAS.
HOLD Hold is a boolean input. When true, HOLD forces the block into the
Hold substate of Auto, holding the output at its last computed value.
HSCI1 High Scale for Input Range 1 is a real value that defines the upper limit of
the measurement ranges. EI1 defines the units. Make the range and units
consistent with the measurement source. A typical value is 100 (percent).
HSCO1 High Scale for Output Range 1 is a real value that defines the upper limit
of the ranges for Output 1. A typical value is 100 (percent). EO1 defines
the units. Make the range and units consistent with those of the output
destination.
INITMA Initialize Manual/Auto specifies the desired state of the MA input during
initialization, where:
0 = Manual
1 = Auto
2 = The MA state as specified in the checkpoint file.
The block asserts this initial M/A state whenever:
+ It is installed into the Control Processor database.
+ The Control Processor undergoes a reboot operation.
+ The compound in which it resides is turned on.
+ The INITMA parameter itself is modified via the control configu-
rator. (The block does not assert INITMA on ordinary
reconfiguration.)
INITMA is ignored if MA has an established linkage.
LOCKID Lock Identifier is a string identifying the workstation which has locked
access to the block via a successful setting of LOCKRQ. LOCKID has the
format LETTERBUG:DEVNAME, where LETTERBUG is the 6-char-
acter letterbug of the workstation and DEVNAME is the 1 to 6 character
logical device name of the Display Manager task.
LOCKRQ Lock Request is a boolean input which can be set true or false only by a
SETVAL command from the LOCK U/L toggle key on workstation dis-
plays. When LOCKRQ is set true in this fashion a workstation identifier
accompanying the SETVAL command is entered into the LOCKID
parameter of the block. Thereafter, set requests to any of the blocks
parameters are honored (subject to the usual access rules) only from the
workstation whose identifier matches the contents of LOCKID.
LOCKRQ can be set false by any workstation at any time, whereupon a
new LOCKRQ is be accepted, and a new ownership workstation identifier
written to LOCKID.
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LOOPID Loop Identifier is a configurable string of up to 32 characters which iden-
tifies the loop or process with which the block is associated. It is displayed
on the detail display of the block, immediately below the faceplate.
LSCI1 Low Scale for Input Range 1 is a real value that defines the lower limit of
the measurement ranges. A typical value is 0 (percent). EI1 defines the
units. Make the range and units consistent with those of the measurement
source.
LSCO1 Low Scale for Output Range 1 is a real value that defines the lower limit of
the ranges for Output 1. A typical value is 0 (percent). EO1 defines the
units. Make the range and units consistent with those of the output desti-
nation.
MA Manual Auto is a boolean input that controls the Manual/Automatic
operating state (0 = false = Manual; 1 = true = Auto). In Auto, given the
measurement value, the block computes the output according to its spe-
cific algorithm. The block automatically limits the output to the output
range specified between LSCO1 and HSCO1, for analog blocks. In Man-
ual, the algorithm is not performed, and the output is unsecured. An
external program can then set the output to a desired value.
MEAS Measurement is an input identifying the source of the blocks input, or the
controlled variable.
NAME Name is a user-defined string of up to 12 characters used to access the
block and its parameters.
NUMBKT Number of Buckets specifies the number of buckets to be used for storing
intermediate deadtime values in a DTIME block.
OUT Output, in Auto mode, is the result of the block algorithm applied to one
or more input variables. In Manual, OUT is unsecured, and can be set by
you or by an external task.
OWNER Owner is a string of up to 32 ASCII characters which is used to allocate
control blocks to applications. Attempts to set Owner are successful only
if the present value of Owner is the null string, an all-blank string, or iden-
tical to the value in the set request. Otherwise the request is rejected with a
LOCKED_ACCESS error. Owner can be cleared by any application by
setting it to the null string; this value is always accepted, regardless of the
current value of Owner. Once set to the null string, the value can then be
set as desired.
PERIOD Period is an indexed input that dictates the blocks execution time base
and allowable PHASE values. For stations other than gateways, PERIOD
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values range from 0 to 13 and map to the following period time lengths.
(Gateway blocks have different period values than shown here.)
* If the BPC is 0.2 sec. this period is treated internally as 0.6 sec., but the
PERIOD parameter remains 1.
** If the BPC is 2.0 sec. this period is treated internally as 6.0 sec., but the
PERIOD parameter remains 10.
*** If the BPC is 0.5 sec. this period is treated internally as 0.5 sec., but
the PERIOD parameter remains 11.
****If the BPC is not 2.0 sec. this period is treated internally as 5.0 sec.,
but the PERIOD parameter remains 12.
***** Available in CP40, CP40B, CP60 and later control processors.
PERTIM Period Time is the period of the block expressed in seconds.
PHASE Phase is an integer input that causes the block to execute at a specific BPC
within the time determined by the PERIOD. For instance, a block with
PERIOD of 3 (2.0 sec) can execute within the first, second, third, or
fourth BPC of the 2-second time period, assuming the BPC of the Con-
trol Processor is 0.5 sec. Refer to the appropriate Integrated Control Soft-
ware Concepts document (B0700AG or B0193AW).
PROPT Propagate Error Option is a boolean input. When true, PROPT sets the
ERROR Status bit of the output parameter if the input to the MEAS
parameter is in error while the block is in Auto. The input to the MEAS
parameter is in error when:
+ Its BAD status bit is set true.
+ Its OOS (Out-of-Service) status bit is set true.
+ Its ERROR status bit is set true.
+ It is experiencing peer-to-peer path failure.
If a transition to Manual occurs while the ERROR status is true, it
remains true until either a set command is written to that output or until
the block transfers to Auto with the error condition returned to normal.
RI1 Range Input is an array of real values that specify the high and low engi-
neering scale and change delta of a particular real input. For a given block,
Period Length Period Length
0 0.1 sec 7 10 min
1 0.5 sec* 8 60 min
2 1.0 sec 9 0.2 sec
3 2.0 sec 10 5.0 sec**
4 10 sec 11 0.6 sec***
5 30 sec 12 6.0 sec****
6 1 min 13 0.05 sec*****
26. DTIME Dead Time Compensator Block B0193AX Rev AB
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it also forms an association with a group of real input parameters that have
the same designated range and change delta.
RO1 Range Output is an array of real values that specify the high and low engi-
neering scale of a particular real output. For a given block, it also forms an
association with a group of real output parameters that have the same des-
ignated range.
TYPE When you enter DTIME or select DTIME from the block type list
under Show, an identifying integer is created specifying this block type.
26.4 Detailed Operation
In Manual, the output is unsecured and can be manipulated by performing Object Manager Set
commands. In addition, the block does not perform deadtime compensation and the Follow fea-
ture is inoperable.
A transition from Manual-to-Auto mode forces all deadtime dynamics to vanish so that the mea-
surement immediately appears at the output.
In Auto, the block performs deadtime compensation if the FOLLOW input is false. If the FOL-
LOW input is true, then the block operates in the FOLLOW mode, whereby the output tracks
the measurement value. A transition in the Follow input from true to false forces old deadtime
dynamics to vanish so that the block begins delaying the measurement signal by the DT amount
at the moment the transition occurs.
In Hold mode (when HOLD is set), sampling is suspended, buckets are frozen, and the output
remains unchanged.
Control Error Option (CEOPT) determines how the block output responds to control errors in
the MEAS input. It is a configurable short integer with the following values and effects:
+ 0 = Take no action based on MEAS control errors. (This is the default.)
+ 1 = Go to the HOLD state if the BAD or OOS status bit of MEAS is true, or the OM
field of MEAS status indicates off-scan.
+ 2 = Go to the HOLD state if the BAD, OOS, or ERROR status bit of MEAS is true,
or the OM field of MEAS status indicates off-scan.
While deadtime compensation is being performed, the DT parameter establishes the average
delay time it takes for the measurement signal to appear at the output. Up to ten data storage ele-
ments, or buckets, see Figure 26-2, are used to shift the measurement samples during the
elapsed delay time. The shift time between samples produces the desired delay time. The number
of buckets in each block is configurable, up to a maximum of ten buckets, which is the default.
Each bucket is also available as a connectable block output.
When DTOPT is not set, the incoming measurement samples at each block execution period are
averaged over the shift time period, for example to avoid loss of signal resolution. The average
measurement values are shifted through the bucket brigade. To avoid rapid change of the output
signal at each shift time, the output undergoes linear interpolation between the last two oldest
stored values during each block execution time.
When DTOPT is set, the averaging of incoming measurement samples is disabled and, at each
deadtime block execution, the current measurement value (MEAS) is directly stored into the
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newest bucket, while the block output is updated each deadtime block execution with the value
from the oldest bucket.
When DTFLAG is used, the block can be used for short-term data collection. At each shift
period, DTFLAG is incremented to indicate that a new set of bucket data is available. If
DTFLAG is put into an open variables list, the incrementing of DTFLAG can be used to trigger
GETVAL calls to retrieve the bucket parameters BKT_1 through BKT_10.
Figure 26-2. DTIME Signal Flow Diagram
26.4.1 Algorithm Description
In the Automatic mode, with Follow = Off, measurements are averaged, stored serially in n (up to
ten) data elements called buckets and loaded into the output filter. See Figure 26-2.
The input averaging filter loads into bucket n an average value of the measurement. Samples are
taken each block period over a length of time equal to 1/n
th
the specified deadtime. This prevents
a deterioration of signal resolution.
Each bucket holds the data for 1/n
th
of the specified deadtime (DT) and then shifts the averaged
value into the next bucket. When the value has been shifted through n buckets, the deadtime
compensation has been achieved.
In order to avoid a sharp change of values between two consecutive output periods (1/n
th
the total
deadtime), an Output Interpolation Filter is used to provide an interpolation between the
2 oldest values (values stored in buckets 2 and 1).
The Follow mode routes the measurement completely around the compensation routine and
feeds it directly to the output.
The Manual mode virtually switches out the entire DTIME block.
MEAS (t)
MEAS (t) dt
1
st
st
0
(k * st)
MEAS
bk
(n)
bk
(n-1)
***
bk
(2)
bk
(1)
Bucket Brigade
st st st st
* * * *
DT
Output
Interpolation
Filter
OUT MANUAL SETS
* st = shift time
FOLLOW
MA
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A transition from Manual-to-Auto forces all deadtime dynamics to vanish so that the measure-
ment immediately appears at the output and the signal begins the delay at the moment of transi-
tion. This action is also taken for a transition of Follow and Hold from On to Off.
The transition from Auto-to-Manual releases the block output, which retains the last value prior
to the transition. While the block is in Manual mode, an operator can make changes to the out-
put (via Object Manager SET commands) by ramping the output at the faceplate or by making a
Direct Data Entry.
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