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N-Channel 60 V (D-S) MOSFET

PRODUCT SUMMARY FEATURES

• Halogen-free According to IEC 61249-2-21
VDS (V) RDS(on) () a, e Qg (Max)
ID (A) Definition
0.023 at VGS = 10 V 50 • Surface Mount
60 66 nC • Available in Tape and Reel
0.027 at V GS = 4.5 V 40
• Dynamic dV/dt Rating
• Logic-Level Gate Drive
• Fast Switching
• Compliant to RoHS Directive 2002/95/EC

D2PAK (TO-263)

G D S
S
N-Channel MOSFET

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage VDS 60
V
Gate-Source Voltage VGS ± 10
Continuous Drain Currentf TC = 25 °C 50
VGS at 10 V ID
Continuous Drain Current TC = 100 °C 36 A
Pulsed Drain Current a IDM 200
Linear Derating Factor 1.0
W/°C
Linear Derating Factor (PCB Mount)e 0.025
Single Pulse Avalanche Energyb EAS 400 mJ
Maximum Power Dissipation TC = 25 °C 150
PD W
Maximum Power Dissipation (PCB Mount)e TA = 25 °C 3.7
Peak Diode Recovery dV/dt c dV/dt 4.5 V/ns
Operating Junction and Storage Temperature Range TJ, Tstg - 55 to + 175
°C
Soldering Recommendations (Peak Temperature)d for 10 s 300d
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 25 V, starting TJ = 25 °C, L = 179 μH, Rg = 25 , IAS = 51 A (see fig. 12).
c. ISD  51 A, dI/dt  250 A/μs, VDD  VDS, TJ  175 °C.
d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).
f. Current limited by the package, (die current = 51 A).

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THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT
Maximum Junction-to-Ambient RthJA - 62
Maximum Junction-to-Ambient
RthJA - 40 °C/W
(PCB Mount)a
Maximum Junction-to-Case (Drain) RthJC - 1.0
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage VDS VGS = 0, ID = 250 μA 60 - - V
VDS Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 0.070 - V/°C
Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 μA 1.0 - 3.0 V
Gate-Source Leakage IGSS VGS = ± 10 V - - ± 100 nA
VDS = 60 V, VGS = 0 V - - 25
Zero Gate Voltage Drain Current IDSS μA
VDS = 48 V, VGS = 0 V, TJ = 150 °C - - 250
VGS = 10 V I D = 21 A b - 23 -
Drain-Source On-State Resistance RDS(on) 
VGS = 4.5 V I D = 15 A b - 27 -
Forward Transconductance gfs VDS = 25 V, ID = 21A b 23 - - S
Dynamic
Input Capacitance Ciss - 3000 -
VGS = 0 V,
Output Capacitance Coss VDS = 25 V, - 1000 - pF
f = 1.0 MHz, see fig. 5
Reverse Transfer Capacitance Crss - 200 -
Total Gate Charge Qg - 60 -
ID = 51 A, VDS = 48 V, -
Gate-Source Charge Qgs VGS = 5.0 V - 10 nC
see fig. 6 and 13b
Gate-Drain Charge Qgd - 40 -
Turn-On Delay Time td(on) - 17 -
Rise Time tr VDD = 30 V, ID = 51 A, - 230 -
ns
Turn-Off Delay Time td(off) Rg = 4.6 , RD = 0.56 , see fig. 10b - 42 -
Fall Time tf - 110 -
Between lead, D

Internal Drain Inductance LD - 4.5 -

6 mm (0.25") from
nH
package and center of G

Internal Source Inductance LS die contact - 7.5 -

S

Drain-Source Body Diode Characteristics

MOSFET symbol
Continuous Source-Drain Diode Current IS D
- - 50c
showing the
integral reverse A
G

Pulsed Diode Forward Currenta ISM p - n junction diode S

- - 200

Body Diode Voltage VSD TJ = 25 °C, IS = 51 A, VGS = 0 Vb - - 2.5 V

Body Diode Reverse Recovery Time trr - 130 180 ns
TJ = 25 °C, IF = 51 A, dI/dt = 100 A/μsb
Body Diode Reverse Recovery Charge Qrr - 0.84 1.3 μC
Forward Turn-On Time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width  300 μs; duty cycle  2 %.
c. Current limited by the package, (Die Current = 51 A).

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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Fig. 1 - Typical Output Characteristics, TC = 25 °C Fig. 3 - Typical Transfer Characteristics

Fig. 2 - Typical Output Characteristics, TC = 150 °C Fig. 4 - Normalized On-Resistance vs. Temperature

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Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 8 - Maximum Safe Operating Area

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RD
VDS

VGS
D.U.T.
Rg
+
- VDD

5V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %

Fig. 10a - Switching Time Test Circuit

VDS
90 %

10 %
VGS
td(on) tr td(off) tf
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10b - Switching Time Waveforms

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

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L
VDS VDS
Vary tp to obtain
tp
required IAS
VDD
Rg D.U.T. +
V DD
- VDS
I AS
5V
tp 0.01 Ω
IAS

Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

Current regulator
Same type as D.U.T.

QG 50 kΩ

12 V 0.2 µF
5V 0.3 µF

QGS QGD +
VDS
D.U.T. -

VG
VGS

3 mA

Charge
IG ID
Current sampling resistors

Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit

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Peak Diode Recovery dV/dt Test Circuit

+ Circuit layout considerations

D.U.T.
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
-

- +
-

Rg • dV/dt controlled by Rg +
• Driver same type as D.U.T. VDD
-
• ISD controlled by duty factor “D”
• D.U.T. - device under test

Driver gate drive

Period P.W.
D=
P.W. Period

VGS = 10 Va

D.U.T. lSD waveform

Reverse
recovery Body diode forward
current current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
VDD

Re-applied
voltage
Body diode forward drop
Inductor current

Ripple ≤ 5 % ISD

Note
a. VGS = 5 V for logic level devices

Fig. 14 - For N-Channel

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RECOMMENDED MINIMUM PADS FOR D2PAK: 3-Lead

0.420
(10.668)

(9.017)
0.355
(16.129)
0.635

0.145
(3.683)

0.135
(3.429)

0.200 0.050
(5.080) (1.257)

Recommended Minimum Pads

Dimensions in Inches/(mm)

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