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R.M.K. ENGINEERING
COLLEGE

22EC402

Linear Integrated
Circuits
Department : ECE

Batch/Year : 2022-2026 / II year

Created by :Dr. S. Vijayalakshmi

Ms. M. Perarasi
Ms. A. Iyswariya
 TABLE OF CONTENTS

S.No Topics Page No

1. Contents 5-6

2. Course Objectives 8

3. Pre Requisites (Course Names with Code) 10

4 Syllabus (With Subject Code, Name, LTPC 11

details)

5 Course outcomes 13

6 CO- PO/PSO Mapping 15

7 Lecture Plan 17

8 Activity based learning 18

9 Lecture Notes 20-45

10 Assignments 46

11 Part A Q & A 51-56

12 Part B Qs 57-58

13 Supportive online Certification courses 59

14 Real time Applications in day to day life and to 60

Industry

5
S.No Topics Page No

15 Contents beyond the Syllabus 61

16 Assessment Schedule 63

17 Prescribed Text Books & Reference Books 64

18 Mini Project suggestions 65

6
Course Objectives
Subject Name: Linear Integrated Circuits
Subject Code: 22EC402
22EC402 LINEAR INTEGRATED CIRCUITS
COURSE OBJECTIVES

The student should be made to:

To describe the characteristics of operational amplifiers.

To design op–amp circuits for a variety of engineering applications.
To comprehend the working principles of ADC and DAC
To investigate the functions and applications of analog multipliers and PLLs
To construct different waveform generators and voltage regulators
Pre Requisites

22PH102 Physics for Electronics Engineering

22EC201 Electron Devices and Circuit Theory

 Syllabus

Subject Name: Linear Integrated Circuits

Subject Code: 22EC402

22EC402 LINEAR INTEGRATED CIRCUITS LTPC
3024

UNIT I

OPERATIONAL AMPLIFIER CHARACTERISTICS 9+6

Advantages of ICs over discrete components, Classification, Basic information

about Op-amps – Ideal Op- amp Characteristics, Equivalent Circuit, Internal circuit
diagrams of IC 741, Open and Closed loop configurations of IC 741, DC and AC
performance characteristics and its compensation techniques, Slew Rate.

LIST OF EXPERIMENTS Design and Testing of 1. Inverting, Non inverting amplifier,

Differential amplifiers.

UNIT II

APPLICATIONS OF OPERATIONAL AMPLIFIERS 9+6

Linear Applications: Adder, Subtractor, Instrumentation Amplifier, Integrator,

Differentiator, Nonlinear Applications: Logarithmic Amplifier, Antilogarithmic
Amplifier, Comparators, Schmitt trigger, Active Filters: First order and Higher order
Low- Pass, High-Pass and Band-Pass Butterworth Filters.

LIST OF EXPERIMENTS Design and Testing of 2. Integrator, Differentiator, Schmitt

Trigger using Op-amp. 3. Instrumentation amplifier using Op-amp - PSPICE 4.
Active low-pass, High-pass and band-pass filters - PSPICE

UNIT III

ANALOG TO DIGITAL AND DIGITAL TO ANALOG CONVERTERS 9+6

Analog and Digital Data Conversions, D/A converter – specifications - weighted

resistor type, R- 2R Ladder type, Voltage Mode and Current Mode R-2R Ladder
types -A/D Converters – specifications - Flash type - Successive Approximation
type - Single Slope and Dual Slope.

LIST OF EXPERIMENTS Design and Testing of 5. R-2R Ladder Type D-A Converter
using Op-amp - PSPICE
22EC402 LINEAR INTEGRATED CIRCUITS LTPC
3024

UNIT IV

ANALOG MULTIPLIER AND PLL 9+6

Analog Multiplier ICs and their applications, PLL: Operation of the basic PLL,
closed loop analysis, Voltage Controlled Oscillator IC 566, Monolithic PLL IC 565,
application of PLL:FM Demodulator, FSK Demodulator, Frequency synthesizing and
clock synchronization.

LIST OF EXPERIMENTS Design and Testing of 6. PLL Characteristics IC565. 7.

Frequency Synthesizer using IC 565.

UNIT V

WAVEFORM GENERATORS AND VOLTAGE REGULATORS 9+6

Waveform generators: Sine-wave generators – RC phase shift and Wien Bridge

OscillatorTriangular wave generator, IC 555 Timer and its modes of operation,
Fixed voltage regulator– LM317 Adjustable voltage regulator- IC723 general
purpose regulator

LIST OF EXPERIMENTS

Design and Testing of 8. Phase shift and Wien bridge oscillators using Op-amp. 9.
Voltage regulator-IC723 10. Astable and Monostable multivibrators using NE555
Timer - PSPICE

-.

TOTAL: 45 PERIODS(THEORY) +30 PERIODS (LAB)

= 75 PERIODS
5. COURSE OUTCOMES

COURSE OUTCOMES:

On successful completion of the course, the students should be able to

Highest
Course Outcomes Cognitive
Level
Express the AC and DC characteristics of
CO 1 K2
Op-amp with its compensation techniques.
Elucidate the functions of Op-amp in linear
CO 2 K3
and nonlinear applications.
Classify and comprehend the working
CO 3 K3
principle of data converters.
Illustrate the function of application
CO 4 specific ICs such as, Analog Multiplier, PLL K2
and its applications.
Comprehend the effect of voltage
CO 5 regulators in power supply. K2

CO 6 Design and evaluate various waveform

generator circuits using Op-amp K6
CO-PO/PSO mapping
6.CO- PO/PSO Mapping

Program
Course Outcomes

Program Outcomes Specific

Level of CO

Outcomes
K3,K5
K3 K4 K4 K5 A3 A2 A3 A3 A3 A3 A2 K6 K5 K3
,K6

PO-11
PO-10

PO-12

PSO-1

PSO-2

PSO-3
PO-1

PO-2

PO-3

PO-4

PO-5

PO-6

PO-7

PO-8

PO-9
3
C01 K2 z 2 2 2 1 1 - - - - 1 1 2 2

C02 K3 3 2 2 2 1 1 - - - - 1 1 2 2 2

C03 K3 3 2 2 2 1 1 - - - - 1 1 2 3 3

C04 K3 3 2 2 2 1 1 - - - - 1 1 2 2 2

C05 K3 3 2 2 2 1 1 - - - - 1 1 2 2 2

C06 K3 3 2 2 2 1 1 - - - - 1 1 2 3 3

CO 3 2 2 2 1 1 - - - - 1 1 2 3 3
 Unit -1
BASICS OF OPERATIONAL
AMPLIFIERS
 LECTURE PLAN
UNIT I– BASICS OF OPERATIONAL AMPLIFIERS

Mode of Delivery
Taxonomy level
Proposed Date
No. of Periods

Pertaining CO
Actual Date

Reason for
Deviation
S.No

Topic

1 Advantages of ICs 1 03.01. 03.01. CO1 K2 Black -

over discrete 2024 2024 Understand board,chalk
components, Basic
information about
op-amps
2 Ideal Operational 1 04.01. 04.01. CO1 K2 Black -
Amplifier 2024 2024 Understand board,chalk

3 General operational 1 06.01. 06.01. CO1 K2 Blackboard, -

amplifier stages and 2024 2024 Understand chalk
internal circuit
diagrams of IC 741
4 DC performance 1 06.01. 06.01. CO1 K4 Blackboard, -
characteristics 2024 2024 Analyze chalk

5 DC performance 1 08.01 08.01. CO1 K3 Blackboard, -

characteristics Apply chalk
.2024 2024

6 . 1 10.01. 10.01. CO1 K3 Blackboard, -

AC performance 2024 2024 Apply chalk
characteristics

7 AC performance 1 11.01. 11.01. CO1 K3 Blackboard, -

characteristics 2024 2024 Apply chalk

8 slew rate, Open and 1 24.01. 24.01. CO1 K3 PPT -

closed loop 2024 2024 Apply
configurations

9 Revision-Problems 1 25.01. 25.01. CO1 K3 Blackboard, -

2024 2024 Apply chalk

Total No. of Periods : 9

8.Activity based learning –UNIT I

1. Identify the IC.

(a)

(b)

(c)

2. Identify the monolithic IC

(a)

(b)
.
8.Activity based learning –UNIT I

3. Find the pin configuration of μA741operational amplifier?

 9. LECTURE NOTES
UNIT 1 - BASICS OF OPERATIONAL AMPLIFIERS

1.1 Integrated Circuits :

An integrated circuit (IC) is a miniature, low cost electronic circuit consisting of
active and passive components fabricated together on a single crystal of silicon. The
active components are transistors and diodes and passive components are resistors
and capacitors.
1.2 Advantages of integrated circuits:
Miniaturization and hence increased equipment density.
Cost reduction due to batch processing.
Increased system reliability due to the elimination of soldered joints.
Improved functional performance.
Matched devices.
Increased operating speeds.
Reduction in power consumption
1.3 Classification :
Integrated circuits can be classified into analog, digital and mixed signal (both
analog and digital on the same chip). Based upon above requirement two
different IC technology namely Monolithic Technology and Hybrid Technology
have been developed. In monolithic IC ,all circuit components ,both active and
passive elements and their interconnections are manufactured into or on top of a
single chip of silicon. In hybrid circuits, separate component parts are attached to
a ceramic substrate and interconnected by means of either metallization pattern
or wire bounds.
Digital integrated circuits can contain anything from one to millions of logic gates,
flip-flops, multiplexers, and other circuits in a few square millimeters. The small
size of these circuits allows high speed, low power dissipation, and reduced
manufacturing cost compared with board-level integration. These digital ICs,
typically microprocessors, DSPs, and micro controllers work using binary
mathematics to process "one" and "zero" signals.
Analog ICs, such as sensors, power management circuits, and operational
amplifiers, work by processing continuous signals. They perform functions like
amplification, active filtering, demodulation, mixing, etc. Analog ICs ease the
burden on circuit designers by having expertly designed analog circuits available
instead of designing a difficult analog circuit from scratch.
ICs can also combine analog and digital circuits on a single chip to create
functions such as A/D converters and D/A converters. Such circuits offer smaller
size and lower cost, but must carefully account for signal interference
Classification of ICs

Fig.1 Classification of ICs

1.4 Generations
SSI, MSI and LSI
The first integrated circuits contained only a few transistors. Called "Small-Scale
Integration“ (SSI), digital circuits containing transistors numbering in the tens provided a
few logic gates for example, while early linear ICs such as the Plessey SL201 or the
Philips TAA320 had as few as two transistors. The term Large Scale Integration was first
used by IBM scientist Rolf Landauer when describing the theoretical concept, from there
came the terms for SSI, MSI, VLSI, and ULSI.
They began to appear in consumer products at the turn of the decade, a typical
application being FM inter-carrier sound processing in television receivers.
The next step in the development of integrated circuits, taken in the late 1960s,
introduced devices which contained hundreds of transistors on each chip, called
"Medium-Scale Integration" (MSI).
They were attractive economically because while they cost little more to produce than SSI
devices, they allowed more complex systems to be produced using smaller circuit boards,
less assembly work (because of fewer separate components), and a number of other
advantages.
VLSI
The final step in the development process, starting in the 1980s and continuing
through the present, was "very large-scale integration" (VLSI). The development
started with hundreds of thousands of transistors in the early 1980s, and
continues beyond several billion transistors as of 2007.
In 1986 the first one megabit RAM chips were introduced, which contained more
than one million transistors. Microprocessor chips passed the million transistor
mark in 1989 and the billion transistor mark in 2005.
ULSI, WSI, SOC and 3D-IC
To reflect further growth of the complexity, the term ULSI that stands for "Ultra-
Large Scale Integration" was proposed for chips of complexity of more than 1
million transistors.
Wafer-scale integration (WSI) is a system of building very-large integrated circuits
that uses an entire silicon wafer to produce a single "super-chip". Through a
combination of large size and reduced packaging, WSI could lead to dramatically
reduced costs for some systems, notably massively parallel supercomputers. The
name is taken from the term Very-Large-Scale Integration, the current state of
the art when WSI was being developed.
System-on-a-Chip (SoC or SOC) is an integrated circuit in which all the
components needed for a computer or other system are included on a single chip.
The design of such a device can be complex and costly, and building disparate
components on a single piece of silicon may compromise the efficiency of some
elements.
However, these drawbacks are offset by lower manufacturing and assembly costs
and by a greatly reduced power budget: because signals among the components
are kept on-die, much less power is require. Three Dimensional Integrated Circuit
(3D-IC) has two or more layers of active electronic components that are
integrated both vertically and horizontally into a single circuit.
Communication between layers uses on-die signaling, so power consumption is
much lower than in equivalent separate circuits. Judicious use of short vertical
wires can substantially reduce overall wire length for faster operation.
 1.5Basic information about operational amplifiers

An operational amplifier is a direct coupled high gain amplifier consisting of

one or more differential amplifiers, followed by a level translator and an output
stage.
It is a versatile device that can be used to amplify ac as well as dc input signals
& designed for computing mathematical functions such as addition, subtraction
,multiplication, integration & differentiation

1.6Ideal operational Amplifiers

✓ Infinite voltage gain A.

✓ Infinite input resistance Ri, so that almost any signal source can drive
it and there is no
loading of the proceeding stage.
Zero output resistance Ro, so that the output can drive an infinite number
of other devices.
Zero output voltage, when input voltage is zero.
Infinite bandwidth, so that any frequency signals from o to ∞ HZ can be
amplified with out attenuation.
Infinite common mode rejection ratio, so that the output common mode
noise voltage is zero.
Infinite slew rate, so that output voltage changes occur simultaneously
with input voltage changes
.
1.7 General Operational Am plifier stages and internal circuit diagrams
of IC 741

An operational amplifier generally consists of three stages, namely

1. A differential amplifier
2.Additional amplifier stages to provide the required voltage gain and dc
level shifting.
3.An emitter-follower or source follower output stage to provide
current gain and low output resistance.

A low-frequency or dc gain of approximately 104 is desired for a

general purpose op-amp and hence, the use of active load is preferred in
the internal circuitry of op-amp.The output voltage is required to be at
ground, when the differential input voltages are zero, and this necessitates
the use of dual polarity supply voltage. Since the output resistance of op-
amp is required to be low, a complementary push-pull emitter – follower or
source follower output stage is employed. Moreover, as the input bias
currents are to be very small of the order of pico amperes, an FET input
stage is normally preferred.

Input stage:

The input differential amplifier stage uses p-channel JFETs M1 and M2. It employs
a three- transistor active load formed by Q3, Q4, and Q5. The bias current for
the stage is provided by a two-transistor current source using PNP transistors
Q6 and Q7. Resistor R1 increases the o utput resistance seen looking into the
collector of Q4 as indicated by R04. This is necessary to provide bias current
stability against the transistor parameter variations. Resistor R2 establishes a
definite bias current through Q5. A single ended output is taken out at the
collector of Q4.MOSFET‘s are used in place of JFETs with additional devices in
the circuit to prevent any damage for the gate oxide due to electrostatic
discharges.

Gain stage:

The second stage or the gain stage uses Darlington transistor pair formed by
Q8 and Q9 as shown in figure. The transistor Q8 is connected as an emitter
follower, providing large input resistance.

15
 Fig. 2 Internal stages of Op-amp

Output stage:
The final stage of the op-amp is a class AB complementary push-pull output
stage. Q11 is an emitter follower, providing a large input resistance for minimizing
the loading effects on the gain stage. Bias current for Q11 is provided by the
current mirror formed by Q7 and Q12, through Q13 and Q14 for minimizing the cross
over distortion. Transistors can also be used in place of the two diodes.
The overall voltage gain AV of the op-amp is the product of voltage gain of each
stage as given by AV=|Ad| |A2||A3|
Where Ad is the gain of the differential amplifier stage, A2 is the gain of the
second gain stage and A3 is the gain of the output stage.

IC 741 Bipolar operational amplifier:

The IC 741 produced since 1966 by several manufactures is a widely used

general purpose operational amplifier. Figure shows that equivalent circuit of
the 741 op-amp, divided into various individual stages. The op-amp circuit
consists of three stages.
1. The input differential amplifier
2. The gain stage
3. the output stage.
A bias circuit is used to establish the bias current for whole of the circuit in the
IC. The op-amp is supplied with positive and negative supply voltages of value
± 15V and the supply voltages as lowas ±5V can also be used.

16
Bias Circuit:
The reference bias current IREF for the 741 circuit is established by the bias
circuit consisting of two diodes-connected transistors Q11 and Q12 and resistor
R5. The Widlar current source formed by Q11, Q10 and R4 provide bias current for
the differential amplifier stage at the collector of Q10. Transistors Q8 and Q9 form
another current mirror providing bias current for the differential amplifier. The
reference bias current IREF also provides mirrored and proportional current at
the collector of the double –collector lateral PNP transistor Q13. The transistor
Q13 and Q12 thus form a two-output current mirror with Q13A providing bias
current for output stage and Q13B providing bias current for Q17. The transistor
Q18 and Q19 provide dc bias for the output stage. Formed by Q14 and Q20 and they
establish two VBE drops of potential difference between the bases of Q14 and
Q18.
Input stage:
The input differential amplifier stage consists of transistors Q1 through Q7 with
biasing provided by Q8 through Q12. The transistor Q1 and Q2 form emitter –
followers contributing to high differential input resistance, and whose output
currents are inputs to the common base amplifier using Q3 and Q4 which offers a
large voltage gain. The transistors Q5, Q6 and Q7 along with resistors R1, R2 and
R3 from the active load for input stage. The single-ended output is available at
the collector of Q6. The two null terminals in the input stage facilitate the null
adjustment. The lateral PNP transistors Q3 and Q4 provides additional
protection against voltage breakdown conditions.
The emitter-base junction Q3 and Q4 have higher emitter-base breakdown
voltages of about 50V. Therefore, placing PNP transistors in series with NPN
transistors provide protection against accidental shorting of supply to the input
terminals.

Gain Stage:
The Second or the gain stage consists of transistors Q16 and Q17, with Q16 acting
as an emitter – follower for achieving high input resistance. The transistor Q17
operates in common emitter configuration with its collector voltage applied as
input to the output stage. Level shifting is done for this signal at this stage.
Internal compensation through Miller compensation technique is achieved using
the feedback capacitor C1 connected between the output and input terminals of
the gain stage.

Output stage:
The output stage is a class AB circuit consisting of complementary emitter
follower transistor pair Q14 and Q20. Hence, they provide an effective loss output
resistance and current gain. The output of the gain stage is connected at the
base of Q22, which is connected as an emitter follower providing a very high
input resistance, and it offers no appreciable loading effect on the gain stage. It
is biased by transistor Q13A which also 17 drives Q18 and Q19, that are used for
establishing a quiescent bias current in the output transistors Q14 and Q20.
1.8 AC Characteristics:

For small signal sinusoidal (AC) application one has to know the ac
characteristics such as frequency response and slew-rate.

1. Frequency Response:

The variation in operating frequency will cause variations in gain magnitude and
its phase angle. The manner in which the gain of the op-amp responds to
different frequencies is called the frequency response. Op-amp should have an
infinite bandwidth BW =∞ (i.e.) if its open loop gain in 90dB with dc signal its
gain should remain the same 90 dB through audio and onto high radio
frequency. The op-amp gain decreases (roll-off) at higher frequency what
reasons to decrease gain after a certain frequency reached. There must be a
capacitive component in the equivalent circuit of the op-amp. For an op-amp
with only one break (corner) frequency all the capacitors effects can be
represented by a single capacitor C. Below fig is a modified variation of the low
frequency model with capacitor C at the output.

Fig 3 Equivalent circuit of practical circuit

There is one pole due to R0 C and one -20dB/decade. The open loop voltage
gain of an op-amp with only one corner frequency is obtained from above fig.
f1 is the corner frequency or the upper 3 dB frequency of the op-amp. The
magnitude and phase angle of the open loop volt gain are f1 of frequency can
be written as,
The magnitude and phase angle characteristics:
1. For frequency f<< f1 the magnitude of the gain is 20 log AOL in db.
2. At frequency f = f1 the gain in 3 dB down from the dc value of AOL in db.
This frequency f1 is called corner frequency.
3. For f>> f1 the fain roll-off at the rate off -20dB/decade or -6dB/decade.

Fig 4 Frequency response of op amp

18
 From the phase characteristics that the phase angle is zero at frequency f
= 0. At the corner frequency f1 the phase angle is -45 (lagging and an infinite
frequency the phase angle is -90 . It shows that a maximum of 90 phase change
can occur in an op-amp with a single capacitor C. Zero frequency is taken as the
decade below the corner frequency and infinite frequency is one decade above
the corner frequency.

Fig: 5 Roll off rate of op amp gain

2 Circuit Stability:
A circuit or a group of circuit connected together as a system is said to be
stable, if its o/p reaches a fixed value in a finite time. A system is said to be
unstable, if its o/p increases with time instead of achieving a fixed value. In
fact the o/p of an unstable sys keeps on increasing until the system break
down. The unstable system is impractical and need be made stable. The
criterion gn for stability is used when the system is to be tested practically. In
theoretically, always used to test system for stability, ex: Bode plots.
Bode plots are compared of magnitude Vs Frequency and phase angle Vs
frequency. Any system whose stability is to be determined can represented by
the block diagram.

Fig. 6 Feedback loop system

The block between the output and input is referred to as forward block and the
block between the output signal and f/b signal is referred to as feedback block.
The content of each block is referred as transfer frequency. From fig. we
represented it by AOL (f) which is given by
19
 AOL (f) = V0 /Vin if Vf = 0 ----- (1)
where AOL (f) = open loop volt gain.
The closed loop gain Af is given by
AF = V0 /Vin= AOL / (1+(AOL ) (B) ----(2)
B = gain of feedback circuit.
B is a constant if the feedback circuit uses only resistive components.
Once the magnitude Vs frequency and phase angle Vs frequency plots are
drawn, system stability may be determined as follows
1.Method 1:
Determine the phase angle when the magnitude of (AOL) (B) is 0dB (or) 1.
If phase angle is >-180 , the system is stable. However, the some systems the
magnitude may never be 0, in that cases method 2, must be used.
2.Method 2:
Determine the phase angle when the magnitude of (AOL) (B) is 0dB (or) 1.
If phase angle is > - 180 , If the magnitude is –ve decibels then the system is
stable. However, the some systems the phase angle of a system may reach -
1800, under such conditions method 1 must be used to determine the system
stability.

20
1.9 Concept of Frequency Compensation

It can be noted that op-amp with single break / corner frequency is

inherently stable. Consider a system with 3 break frequencies. Due to this an
additional phase shift of -180º is present between the inverting input and
output terminals. Hence the op-amp may behave oscillatory and become
unstable. The phase margin becomes negative. The method of modifying
loop gain frequency response of the op-amp so that it behaves like
single break frequency response that provides sufficient positive phase
margin is called Frequency compensation Technique. For hig gain op- amps
the phase margin is more than +45º, though the op-amp is non-
compensated. But for lower gain op-amps, the phase margin is smaller than
+45º and there is chance of instability. Thus the op-amps with high closed
loop gain are easy to compensate while op-amp with low closed loop gain are
difficult to compensate to provide stability. Hence in practice compensation
techniques are introduced both internally and externally.

1) External compensation 2) Internal compensation.

External Compensation Techniques

The compensation network is connected externally to alter the response as

per requirements. The methods adopted are

1) Dominant Pole compensation 2) Pole-zero compensation.

Dominant Pole compensation: Consider an op-amp with 3 break

frequencies. Its loop gain be A.

AOL
A=  
f f  f 
 1+ j 
f1 
1+ j 
f 2 
1+ j
f3 


Here the dominant pole is introduced by adding a compensating network. It

is essentially an RC network as shown in figure.

VO’
R
Vin VO

C
The dominant pole means the pole with magnitude much smaller than the
existing poles. Hence the break frequency of the compensating network is
the smallest compared to the existing break frequencies. The transfer
function of the compensating network is given as

Let A1 be the transfer function of the compensating network = Vo / Vo’

VO − jX C
By voltage divider rule, A1 =
VO ' R − jX C
On simplification we get A1 1
1 + j2 fRC

1 1
Let f d = and A 1 =
2 R C  f 
1+ j 
 fd

Where fd is called the break frequency of the compensating network. Hence the
compensated transfer function is given by

AOL
A' =
 f  f  f  f 
1 + j   1 + j  1 + j  1+ j
fd   f1   f2   f 3 


The values of R and C are selected in such a way that the loop gain drops to
0 dB with a slope of -20 dB / decade and at a frequency where the poles of
the uncompensated system contributes very small phase shift. This ensures
that at gain cross over frequency the phase shift is greater than -180º and
hence positive phase margin exist. Generally fd is selected so that magnitude
plot for A’ passes through 0 dB at the pole f1 of A. The compensated and
uncompensated plots are shown in figure 2.10
Loop
Uncompensated
gain (dB)
3dB
AOL

Compensated

Freq (f) Hz
BW2
BW1
for compensated system is BW2. Here the bandwidth reduces w.r.t.
compensated system.

Merits: 1) Excellent noise immunity system as the bandwidth is small.

2) By adjusting fd, adequate phase margin and stability of the system is
assured.
Demerits: The Bandwidth is drastically reduced for a compensated system.

Pole Zero compensation:

Consider an op-amp with 3 break frequencies. Its loop gain be A.t can be seen
that the 3 dB bandwidth for a non compensated system is BW1 and that
AOL
A= 
f  f  f 
1+ j f  1+ j f  1+ j f 
 1  2  3 

Here the transfer function A is modified by adding a pole and zero with the help of compensating
network. The zero added is at HF while the pole is at LF. Such a network is shown in figure 2.11

VO’
R1
Vin Vo
R2

Let A1 be the transfer function of the compensating network =

Vo / Vo’ Let Z1=R1 & Z2 = R2-jXC2

Z2
By Voltage Divider rule, A1
= Z1 + Z 2

R 2 − jX C 2
 A1 =
R1 + R 2 − jX C 2

1 + j2 fR2 C 2
On simplification,
1 + j2  f ( R1 + R 2 )C 2
1
 1 1
Now let f 1 and f o =
= 2 R 2 C 2 2 ( R1 + R 2 )C 2

 f 
1+ j  
 A1 =  f1
 f 
1+ j  
 fO

The values of Resistors and Capacitors are so selected that the break frequency for
zero matches with the first corner frequency f1 of the uncompensated
system while the pole of the compensating network at fo passes through 0
dB at the second corner frequency f2 of the uncompensated system. The loop
gain becomes A’ = AA1.
 f 
AO L  1 + j
 f1 
A1  f  f  f  f 
=
1 + j f  1 + j f   1 + j f  1 + j f 
 0  1  2  3 

Where 0<f0<f1<f2<f3. The first corner frequency is now fo, and the gain starts rolling off
at -20 dB / decade at fo. At f = f1, there is pole zero cancellation and rolling rate
continues as -20 dB / decade. The values of Resistors and Capacitors are so selected
that plot passes through 0 dB at f2. The response is shown in figure

Uncompensated
AOL
Compensated

0 dB

f0 f1
f2 f3
As compared to the dominant pole compensation there is an improvement in
bandwidth.
 Internal Compensation Techniques
In recently developed op-amps like IC741, the compensation is built
internally. A capacitor ranging from 10-30pF is fabricated between input
and output stage to achieve the required compensation. This type of
compensation is called Miller effect compensation. The demerit of dominant
pole compensation techniques are overcome in this type. Here the
capacitor is connected in the feedback path of the Darlington pair used in
the output stage of the op-amp. These op-amps have single break
frequency and are stable in nature. Some internally compensated
op-amps are µA741, LM 107, LM 741, LM 112 and MC 1858.

1.10 DC Characteristics of op-amp:

Current is taken from the source into the op-amp inputs respond
differently to current and voltage due to mismatch in transistor.
DC output voltages are,
✓ Input bias current
✓ Input offset current
✓ Input offset voltage
✓ Thermal drift

Input bias current:

The op-amp‘s input is differential amplifier, which may be made of BJT or FET.
In an ideal op-amp, we assumed that no current is drawn from the input terminals
the base currents entering into the inverting and non-inverting terminals (IB- &
IB+ respectively).
Even though both the transistors are identical, IB- and IB+ are not exactly equal due
to internal imbalance between two inputs.
If input voltage Vi = 0V. The output Voltage Vo should also be (Vo = 0) but for IB
= 500nA We find that the output voltage is offset by Op-amp with a 1M
feedback resistor
Vo = 500nA X 1M = 500mV
The output is driven to 500mV with zero input, because of the bias currents.
In application where the signal levels are measured in mV, this is totally unacceptable.
This can be compensated by a compensation resistor Rcomp has been added
between the non-inverting input terminal and ground as shown in the figure below.

Fig. 7 Bias compensated circuit

Current IB+ flowing through the compensating resistor Rcomp, then by

KVL we get,
-V1+0+V2-Vo = 0 (or)
Vo = V2 – V1 ---- - ---- (1)

By selecting proper value of Rcomp, V2 can be cancelled with V1 and the Vo = 0.

The value of Rcomp is derived as V1 = IB+Rcomp

IB+ = V1/RCOMP ------------------------ (2)

The node ‘a’ is at voltage (-V1). Because the voltage at the non-inverting
input terminal is (-V1). So with Vi = 0 we get,
I1 = V1/R1 (3) I2 = V2/Rf (4)

21
 Input offset current:

✓ Bias current compensation will work if both bias currents IB+ and IB- are
equal.
Since the input transistor cannot be made identical. There will always be
some small ldifference between| bias currents IB+ and IB- .This difference
called bais currents.
Offset current Ios for BJT op-amp is 200nA and for FET op-amp is 10pA.
Even with bias current compensation, offset current will produce an output
voltage when Vi = 0.
Again V0 = I2 Rf – V1
Vo = I2 Rf - IB+
Rcomp Vo = 1M Ω
X 200nA
Vo = 200mV with Vi = 0
Equation (16) the offset current can be minimized by keeping feedback
resistance small.
✓ Unfortunately to obtain high input impedance, R1 must be kept large.
✓ R1 large, the feedback resistor Rf must also be high. So as to obtain
reasonable gain. The T-feedback network is a good solution. This
will allow large feedback resistance, while keeping the resistance to
ground low (in dotted line).
✓ The T-network provides a feedback signal as if the network were a single
feedback resistor. By T to Π conversion,

To design T- network first pick Rt<<Rf/2 and calculate

Input offset voltage:

In spite of the use of the above compensating techniques, it is found

that the output voltage
22
may still not be zero with zero input voltage [Vo ≠ 0 with Vi= 0]. This is due to
unavoidable imbalances inside the op-amp and one may have to apply a small
voltage at the input terminal to make output (Vo) = 0.
This voltage is called input offset voltage Vos. This is the voltage required
to be applied at the input for making output voltage to zero (Vo = 0).

Let us determine the Vos on the output of inverting and non-inverting amplifier. If
Vi = 0 (Fig (b) and (c)) become the same as in figure (d).

Total output offset voltage:

The total output offset voltage VOT could be either more or less than the offset
voltage produced at the output due to input bias current (IB) or input offset
voltage alone(Vos). This is because IB and Vos could be either positive or negative
with respect to ground. Therefore the maximum offset voltage at the output of
an inverting and non-inverting amplifier (figure b, c) without any compensation
technique used is given by many op amps provide offset compensation pins to
nullify the offset voltage. A 10K potentiometer is placed across offset null pins
1&5. The wipes connected to the negative supply at pin 4. The position of the
wipes is adjusted to nullify the offset voltage.

23
 Fig.8 Compensation circuit for offset voltage

When the given (below) op-amps does not have these offset null pins, external
balancing techniques are used.
With Rcomp, the total output offset voltage
Balancing circuit: Inverting amplifier: Non-inverting amplifier:

Thermal drift:
Bias current, offset current, and offset voltage change with temperature. A circuit
carefully nulled at 25ºC may not remain. So when the temperature rises to
35ºC. This is called drift. Offset current drift is expressed in nA/ºC. These
indicate the change in offset for each degree Celsius change in temperature.

1.11 Slew Rate

Slew rate is the maximum rate of change of output voltage with respect to time.
Specified in V/μs.
Reason for Slew rate:
There is usually a capacitor within 0, outside an op-amp oscillation. It is
this capacitor which prevents the o/p voltage from fast changing input. The rate
at which the volt across the capacitor increases is given by
dVc/dt = I/C --------(1)
I -> Maximum amount furnished by the op-amp to
capacitor C. Op-amp should have the either a higher current or
small compensating capacitors.
For 741 IC, the maximum internal capacitor charging current is limited to
about 15μA. So the slew rate of 741 IC is SR = dVc/dt |max = Imax/C

24
For a sine wave input, the effect of slew rate can be calculated as consider volt
follower. The input is large amp, high frequency sine wave.
If Vs =Vm Sinwt then output V0 = Vm sinwt .
The rate of change of output is given by dV0/dt=Vm w coswt.

Fig. 9 Voltage Follower Circuit

Fig. 10 Input and output waveforms of a voltage follower

The max rate of change of output across when coswt =1
(i.e) SR =dV0/dt |max = wVm.
SR = 2 fVm V/s = 2 fVm v/ms.
Thus the maximum frequency fmax at which undistorted output volt of peak
value Vm is given by fmax (Hz) = Slew rate/6.28 * Vm called the full power
response. It is maximum frequency of a large amplitude sine wave with which
op-amp can have without distortion.

1.12. Open – loop op-amp Configuration:

The term open-loop indicates that no feedback in any form is fed to the input
from the output. When connected in open – loop the op-amp functions as a
very high gain amplifier. There are three open – loop configurations of op-amp
namely,
1. Differential amplifier
2. Inverting amplifier
3. Non-inverting amplifier
The above classification is made based on the number of inputs used and
the terminal to which the input is applied. The op-amp amplifies both ac and
dc input signals. Thus, the input signals can be either ac or dc voltage.

25
1.12.1 Loop Differential Amplifier:

In this configuration, the inputs are applied to both the inverting and the
non- inverting input terminals of the op-amp and it amplifies the difference
between the two input voltages. Figure shows the open-loop differential
amplifier configuration.The input voltages are represented by Vi1 and Vi2. The
source resistance Ri1 and Ri2 are
negligibly small in comparison with the very high input resistance offered by the
op-amp, and thus the voltage drop across these source resistances is assumed
to be zero. The output voltage V0 is given by
V0 = A (Vi1 – Vi2)
where A is the large signal voltage gain. Thus the output voltage is equal to
the voltage gain A times the difference between the two input voltages. This
is the reason why this configuration is called a differential amplifier. In open –
loop configurations, the large signal voltage gain A is also called open-loop
gain A.

Inverting amplifier:
In this configuration the input signal is applied to the inverting input
terminal of the op- amp and the non-inverting input terminal is connected to
the ground. Figure shows the circuit of an open– loop inverting amplifier. The
output voltage is 180 out of phase with respect to the input and hence, the
output voltage V0 is given by, V0 = -AVi. Thus, in an inverting amplifier, the input
signalis amplified by the open-loop gain A and in phase shifted by 180

26
 Non-inverting Amplifier:

Figure shows the open – loop non- inverting amplifier. The input signal is
applied to the non-inverting input terminal of the op-amp and the inverting
input terminal is connected to the ground. The input signal is amplified by the
open – loop gain A and the output is in-phase with input signal. V0 = AVi

In all the above open-loop configurations, only very small values of input
voltages can be applied. Even for voltages levels slightly greater than zero, the
output is driven into saturation, which is observed from the ideal transfer
characteristics of op-amp shown in figure. Thus, when operated in the open-
loop configuration, the output of the op-amp is either in negative or positive
saturation, or switches between positive and negative saturation levels. This
prevents the use of open – loop configuration of op-amps in linear
applications.

Limitations of Open – loop Op – amp configuration:

Firstly, in the open – loop configurations, clipping of the output waveform can
occur when the output voltage exceeds the saturation level of op-amp. This is
due to the very high open – loop gain of the op-amp. This feature actually
makes it possible to amplify very low frequency signal of the order of
microvolt or even less, and the amplification can be achieved accurately
without any
27
distortion. However, signals of such magnitudes are susceptible to noise and
the amplification for that application is almost impossible to obtain in the
laboratory.
Secondly, the open – loop gain of the op – amp is not a constant and it
varies with changing temperature and variations in power supply. Also, the
bandwidth of most of the open- loop op amps is negligibly small. This makes
the open – loop configuration of op-amp unsuitable for ac applications. The
open – loop bandwidth of the widely used 741 IC is approximately 5Hz. But in
almost all ac applications, the bandwidth requirement is much larger than this.
For the reason stated, the open – loop op-amp is generally not used in linear
applications. However, the open – loop op amp configurations find use in
certain non – linear applications such as comparators, square wave generators
and astable multivibrators.

1.12.2 Closed – loop op-amp configuration:

The op-amp can be effectively utilized in linear applications by providing a

feedback from the output to the input, either directly or through another
network. If the signal feedback is out- of- phase by 1800 with respect to the
input, then the feedback is referred to as negative feedback or degenerative
feedback. Conversely, if the feedback signal is in phase with that at the input,
then the feedback is referred to as positive feedback or regenerative feedback.
An op – amp that uses feedback is called a closed – loop amplifier. The
most commonly used closed – loop amplifier configurations are 1. Inverting
amplifier (Voltage shunt amplifier) 2. Non- Inverting amplifier (Voltage –
series Amplifier)
Inverting Amplifier:The inverting amplifier is shown in figure and its alternate
circuit arrangement is shown in figure,
with the circuit redrawn in a different way to illustrate how the voltage shunt
feedback is achieved. The input signal drives the inverting input of the op –
amp through resistor R1.
The op – amp has an open – loop gain of A, so that the output signal is much
larger than the error voltage. Because of the phase inversion, the output
signal is 1800 out – of – phase with the input signal. This means that the
feedback signal opposes the input signal and the feedback is negative or
degenerative.

Practical Inverting amplifier:

The practical inverting amplifier has finite value of input resistance and
input current, its open voltage gain A0 is less than infinity and its output
resistance R0 is not zero, as against the ideal inverting amplifier with finite
input resistance, infinite open – loop voltage gain and zero output resistance
respectively.
Figure shows the low frequency equivalent circuit model of a practical inverting
amplifier. This circuit can be simplified using the Thevenin‘s equivalent circuit
shown in figure. The signal source Vi and the resistors R1 and Ri are replaced
by their Thevenin‘s equivalent values. The closed –
loop gain AV and the input impedance Rif are calculated as follows.
The input impedance of the op- amp is normally much larger than the input
resistance R1.
Therefore, we can assume Veq ≈ Vi and Req ≈ R1

28
 V 0 =IR0 = AV id
Substituting th0e valufe of I derived from above eqn. and obtaining the closed
loop gain. It can be observed from above eqn. that when A>> 1, R0 is
negligibly small and the product AR1 >> R0 +Rf
, the closed loop gain is given by
Which as the same form as given in above eqn for an ideal inverter.

Input Resistance: `

Rif = Vid/ I1 =(Rf+R0)/(1+A)

Output Resistance:

29
Non –Inverting Amplifier:

The non – inverting Amplifier with negative feedback is shown in figure. The
input signal drives the non – inverting input of op-amp. The op-amp provides
an internal gain A. The external resistors R1 and Rf form the feedback voltage
divider circuit with an attenuation factor of β. Since the feedback voltage is at
the inverting input, it opposes the input voltage at the non – inverting input
terminals, and hence the feedback is negative or degenerative.
The differential voltage Vid at the input of the op-amp is zero, because node A is
at the same voltage as that of the non- inverting input terminal. As shown in
figure, Rf and R1 form a potential divider. Therefore,

Figure shows the equivalent circuit to determine Rof. The output impedance Rof
without the load resistance factor RL is calculated from the open circuit output
voltage Voc and the short circuit output current ISC.

Fig. 12 Non –Inverting Amplifier:

Closed Loop Non – Inverting Amplifier

The input resistance of the op – amp is extremely large (approximately infinity,)

since the op – amp draws negligible current from the input signal.

Practical Non –inverting amplifier:

The equivalent circuit of a non- inverting amplifier using the low frequency
model is shown below in figure. Using Kirchhoff’s current law at node a,

30
 The difference volt is equal to the input volt minus the f/b volt. (or) The
feedback volt always opposes the input volt (or out of phase by 1800 with
respect to the input voltage) hence the feedback is said to be negative.

It will be performed by computing

1. Closed loop volt gain
2. Input and output resistance
3. Bandwidth

1. Closed loop volt gain:

The closed loop volt gain is AF = V0 /Vin

V0 = Avid =A(V1 –V2 )

Fig.13 equivalent circuit of practical op amp

A = large signal voltage gain. From the above eqn.
V0 = A(V1 – V2 )
31
 10. Assignments

Q.No Questions

plot the transfer characteristics of the circuit shown below, the

opamp saturates at
±12V.

2 Write the concept of virtual ground

BFF Questions

State the causes for slew rate in an OP-AMP ? How it is indicated

1

2 Write the concept of virtual ground

46
 10. Assignments

Q.No Questions

1
Design a circuit using op-amp whose gain is –3.
The op-amp inverting amplifier is shown. Rf = 3 KΩ
Ri = 1KΩ

An operational amplifier has a slew rate of 4V/µs. Determine the

maximum frequency of operation to produce a distortion less output
swing of 12V. (Nov 2014) Slew rate (SR) =2πfVp / 106 V/µs, Vp- Maximum
2
amplitude of the output.
Given: SR = 4 V/µs, Vp= 12V
f = SR×106 / (2π×12) = 53.078kHz

Q.No Questions

A differential amplifier has a differential voltage gain of 2000

and a common mode gain of 0.2. Determine the CMRR in dB.
1
(May 2015)
CMRR = 20 log |Ad/Ac|
Ad = 2000, Ac=0.2. (Given) CMRR = 2000 / 0.2 = 10000
CMRR in dB = 20 log |Ad/Ac| = 20 log 10000 = 20* 4 = 80dB
An operational amplifier has a slew rate of 4V/µs. Determine the
maximum frequency of operation to produce a distortion less output
swing of 12V. (Nov 2014) Slew rate (SR) =2πfVp / 106 V/µs, Vp- Maximum
2
amplitude of the output.
Given: SR = 4 V/µs, Vp= 12V
f = SR×106 / (2π×12) = 53.078kHz

47
 10. Assignments

Q.No Questions

What is the maximum undistorted amplitude, that a sine wave input of

10 kHz, can produce, at the output of an op-amp whose slew rate is 0.5
V/µs? (Nov 2012)
1
Slew rate (SR)= 2πfVp / 106 V/µs, Vp- Maximum amplitude of the output Given:
SR= 0.5 V/µs, f= 10kHz
Vp=SR×106 / (2π×10k)=1.99 V

An operational amplifier has a slew rate of 4V/µs. Determine the

maximum frequency of operation to produce a distortion less output
swing of 12V. (Nov 2014) Slew rate (SR) =2πfVp / 106 V/µs, Vp- Maximum
2
amplitude of the output.
Given: SR = 4 V/µs, Vp= 12V
f = SR×106 / (2π×12) = 53.078kHz

48
 VIDEO LINKS

Video Links
https://www.youtube.com/watch?v=lpXNCwsnxjM&list=PLuv3
GM6-gsE3npYPJJDnEF3pdiHZT6Kj3

https://www.youtube.com/watch?v=kiiA6WTCQn0&list=PLwjK_iyK4LLDB
B1E9MFbxGCEnmMMOAXOH
10. PART A Q & A (with K
level & CO)
PART A CO’S Blooms
Level
1. Define an Integrated circuit. CO 1 K1
An integrated circuit (IC) is a miniature low cost electronic circuit
consisting of active and passive components fabricated together
on a single crystal of silicon. The active components are
transistors and diodes and passive components are resistors and
capacitors.
2. List the advantages of IC over discrete component CO 1 K2
circuit.
The advantages of Integrated Circuits over discrete components
can be given as Low cost, small size, High reliability, and
Improved performance.

3. What is the purpose of a current source in integrated CO 1 K2

circuits?
By improving the CMRR of differential amplifier, its performance
can be improved. To improve CMRR, common mode gain Ac must
be reduced as much as possible. When this happens RE will be
tending to infinity. But there are practical limitations in selecting
the magnitude of an enormous value of resistance. Use of a
constant current bias instead of RE is the practical solution for
this problem. Without physically increasing the value of RE, the
transistor operated at a constant current gives the effect of very
high value of
resistance. This is the importance of a current source in an IC.
4. What are the various methods available for frequency CO 1 K2
compensation?
There are two types of compensating techniques used for
frequency compensation. They are namely External
compensation and Internal compensation. External frequency has
two methods for compensation namely Dominant pole
compensation and Pole-zero
compensation
PART A CO’S Blooms
Level
5. What is an op-amp? List its functions. CO 1 K2
The op-amp is a multi-terminal device, which internally is quite
complex. It is a direct- coupled high gain amplifier consisting of
one or more differential amplifiers, followed by a level translator
and an output stage. Function: Op-amp amplifies the difference
between two input signals

6. List the essential terminals of an op-amp. CO 1 K2

Op-amp has five basic terminals, that is, two input terminals, one
output terminal and two power supply terminals. Inverting input
terminal : Pin 2,Non- inverting input terminal : Pin 3,Output
terminal : Pin 6 and Power supply terminals : Pin 4& 7
7. List the ideal characteristics of an op-amp. (or) List the CO 1 K2
characteristics of ideal Op- amp and draw its equivalent
circuits?
The ideal characteristics of an op-amp are as follows:
Open loop voltage gain, AOL = ¥
Infinite Input impedance, Ri = ¥
Zero Output impedance, RO = 0
Infinite Bandwidth, BW = ¥
8. Explain the virtual ground concept with a suitable CO 1 K2
example.
We know that Vd = Va - Vb = 0; Node B is grounded. Therefore
Vb = 0; But Vd = 0;Þ Va
= Vb ; Node A is at virtual ground. ie since node B is at ground
node A is also at ground imaginarily.

9. Define input bias current and input offset current of an CO 1 K2

operational amplifier.
Input Bias current: The average of currents entering into the (-
) input terminal & (+) input terminal of an op-amp is called input
bias current. Its value is 500nA for 741C. Input Offset Current:
The algebraic difference between the currents into the (-) input
and (+)input is referred to as input offset current .It is 200Na
maximum for 741C
PART A CO’S Blooms
Level
10. What is the need for frequency compensation in practical op- CO 1 K2
amps?
Frequency compensation is needed when large bandwidth and lower
closed loop gain is desired. Compensating networks are used to
control the phase shift and hence to improve the stability.

11. Mention the frequency compensation methods. CO 1 K2

Dominant-pole compensation
Pole-zero compensation.

12. What are the merits and demerits of Dominant-pole CO 1 K2

compensation?
Noise immunity of the system is improved
Open-loop bandwidth is reduced.

13. Define slew rate. CO 1 K1

The slew rate is defined as the maximum rate of change of output
Voltage caused by a step input voltage. An ideal slew rate is infinite
which means that op-amp’s output voltage should change
instantaneously in response to input step voltage.

14. Why IC 741 is not used for high frequency applications? CO 1 K2

IC741 has a low slew rate because of the predominance of
capacitance present in the circuit at higher frequencies. As frequency
increases the output gets distorted due to limited slew rate.

15. What causes slew rate? CO 1 K2

There is a capacitor with-in or outside of an op-amp to prevent
oscillation. The capacitor which prevents the output voltage from
responding immediately to a fast changing input.

16. What happens when the common terminal of V+ and V- sources CO 1 K2

is not grounded?
If the common point of the two supplies is not grounded, twice the
supply voltage will get applied and it may damage the op-amp.
PART A CO’S Blooms
Level
17. Mention some applications of op-amp in open loop mode. CO 1 K2
Some of the applications of op-amp in open loop mode are as
follows: Comparator, Zero crossing detector, Window detector, Time
marker generator, Phase meter.
Gain = V0 = - R f = -3
Vi R1
Let R1 = 1kW
R f = 3´ R1 = 3kW

18. A differential amplifier has a differential voltage gain of CO 1 K2

2000 and a common mode gain of 0.2. Determine the CMRR
in dB. CMRR = 20 log |Ad/Ac|
Ad = 2000, Ac=0.2. (Given) CMRR = 2000 / 0.2 = 10000
CMRR in dB = 20 log |Ad/Ac| = 20 log 10000 = 20* 4 = 80dB.

19.What are the factors that affect the stability of an op-amp? CO 1 K2

The factors that affect the stability of an op-amp are closed loop gain
and phase shift.

20.Define CMRR AND PSRR. Mention their ideal values. CO 1 K1

CMRR: The relative sensitivity of an op-amp to a difference signal
as compared to a common mode signal is called common mode
rejection ratio and gives the figure of merit
r for the differential amplifier. r = | Ad | where Ad = Differential
mode gain,
| Ac |
Ac = common mode gain, CMRR is typically infinite.
PSRR: The change in an op-amp’s input offset voltage due to
variations in supply voltage is called supply voltage rejection ratio. It
is also termed as power supply rejection ratio or
power supply sensitivity. For 741C, SVRR=150mV/V.
 PART A CO’S Blooms
Level
21. What are the two methods can be used to produce voltage CO 1 K2
sources? (May 2018)
A voltage source is a circuit that produces an output voltage V0, which
is independent of the load driven by the voltage source, or the output
current supplied to the load. The two methods that can be used to
produce a voltage source can be given as Voltage circuit
using Impedance transformation and Common Collector type voltage
source
22. Enumerate any four advantages of ICs over discrete CO 1 K2
component circuits. (Nov 2017)
Advantages of ICs over discrete components can be given as
Reduction in Size
Reliability is improved
Reduction of Power Consumption
Reduction of effects due to Noise.
23. Find the maximum frequency for a sine wave output CO 1 K2
voltage of 12v peak with an OP- AMP whose slew rate is
0.5V/ µs. (Nov 2017)
Slew Rate = 2πfV
f = slew rate/(2πV) = 0.5*106/(2π*12) = 6.6KHz
24.Define Differential Mode gain. (Nov 2018) CO 1 K1
Differential-Mode voltage gain is the gain given to a voltage that
appears between the two input terminals. It represents two different
voltages on the inputs

25. Enumerate any two blocks associated with Op-Amp block CO 1 K2

schematic?
The blocks of an OP-AMP can be given as the differential amplifier,
Voltage amplifier and the Output Amplifier
PART A CO’S Blooms
Level
26.State the limitations of discrete circuits. CO 1 K2
High cost, large size, Low reliability, Reduced performance.

27.Define Slew rate and what causes the slew rate? CO 1 K2

In electronics, slew rate is defined as the maximum rate of change
of output voltage per unit of time and is expressed as volts per
second. Limitations in slew rate capability can
give rise to non-linear effects in electronic amplifiers
28. Mention two advantages of active load over passive load CO 1 K2
in an operational amplifier. The difference mode gain and CMRR
is directly proportional to the RC in differential amplifier. The
resistance value of RC is needed to increase, to achieve high CMRR.
But the use of large resistance value RC occupies large chip area,
and it needs large power supply.
So, the passive load RC is replaced by the current mirror as active
load.
29. Why is current mirror circuit used in differential amplifier CO 1 K1
circuit?
A constant current source makes use of the fact that for a transistor
in the active mode of operation. Thus, in active region the collector
current equal to output current which is
approximately equal to Iref.
30. Enumerate any two blocks associated with Op-Amp block CO 1 K2
schematic?
The blocks of an OP-AMP can be given as the differential amplifier,
Voltage amplifier and the Output Amplifier
11. PART B Qs (with K
level & CO)
 PART B CO’S Blooms
Level

1. Explain Internal circuit diagram of IC741. CO 1

K2
2. Define slew rate. Explain the cause of slew rate and derive an CO 1 K2
expression for slew rate for an op-amp voltage follower. Derive CMRR.
3. Write a brief note on frequency compensation in op-amp. Explain CO 1
various stability criteria of op-amp circuit. K2
4. Discuss its AC performance characteristics. CO 1 K2
5. Discuss DC performance characteristics. CO 1
K2
6. With neat sketch explain closed loop analysis of an op-amp. Also CO 1
compare the performance with open loop configuration. K2
7. Assume that an OP-amp has Ib+=400nA. Ib-=300nA. Find the CO 1
K2
average bias current Ib and offset current Ios.

8. For a typical op-amp, Icq=15uA, and C=35pF. The peak value of CO 1 K2

input is 12v. Determine slew rate and maximum possible frequency of

input voltage that can be applied to get undistorted output
9. What is input voltage and current offsets? How are they CO 1 K2

compensated?
10. Assume that an OP-amp has Ib + =400nA. Ib - =300nA. Find the CO 1 K2

average bias current and offset current Ios.

ii) Explain the two modes of operation of Op-amp
11, List and Explain the non-ideal dc characteristics of Operational CO 1 K2

amplifier.
12. Discuss about the principle of operation differential amplifier using CO 1 K2

BJT.
CO 1 K2
13. With a neat block diagram, explain the general stages of

an OP-AMP IC
CO 1 K2
14. Explain, with a circuit diagram, the working of BJT-emitter

coupled differential amplifier. Also explain the concept of

active load and sketch the relevant circuit diagram
 13.Supportive online Certification courses:

UNIT I :NPTEL/SWAYAM:

1. Integrated Circuits, MOSFETs, Op-Amps and their Applications

By Prof. Hardik Jeetendra Pandya | IISc Bangalore

12 Weeks

https://onlinecourses.nptel.ac.in/noc21_ee31/preview

2. Analog Circuits

By Prof. Jayanta Mukherjee | IIT Bombay

8 Weeks

https://onlinecourses.nptel.ac.in/noc21_ee07/preview

COURSERA

Introduction to Electronics

https://www.coursera.org/lecture/electronics/2-1-introduction-to-op-amps-and-ideal-

behavior-Q5Di2

UDEMY:

Electronics : The Operational Amplifier

https://www.udemy.com/course/operational-amplifiers/

CLASS CENTRAL

Op-Amp Practical Applications: Design, Simulation and Implementation

https://www.classcentral.com/course/swayam-op-amp-practical-applications-design-

simulation-and-implementation-14216
14. Real time Applications in day to day life and to
Industry

Super light Sensitive Intruder Alarm Circuit

Intruder alarms are popular devices used in high-security areas as well as civilian
houses to detect and alarm the presence of any intruders. There are different
kinds of intruder detection alarms, some detect movements by using a laser,
some use pressure variations etc. Our intruder alarm works using an LDR (light
dependent resistor). Also known as photoresistor its resistance varies with the
intensity of light falling on it. Its resistance decreases with increase in light.
Our intruder alarm needs to be placed opposite to a light source since it detects
movements using the changes in the intensity of light falling on it. When a
shadow falls on the LDR its resistance increases and triggers the alarm circuit.

DESCRIPTION
The shadow of an intruder passing few meters nearby the circuit is enough to
trigger the alarm. Here IC2 uA 741 is wired as a sensitive comparator whose set
point is set by R6 &R7. The voltage divide by LDR and R9 is given at non-inverting
pin of IC2. At standby mode, these two voltages are set equal by adjusting R9.
Now the output (pin6) of the comparator will be high. Transistor Q1 will be off.
The voltage at trigger pin of IC1 will be positive and there will be no alarm. When
there is an intruder near the LDR the shadow causes its resistance to increase.
Now the voltages at the inputs of the comparator will be different and the output
of IC2 will be low. This makes Q1 on. This makes a negative going pulse to
trigger the IC1 which is wired as a monostable multivibrator. The output of IC1
will be amplified by Q2 (SL 100) to produce an alarm.
Link: https://www.circuitstoday.com/super-sensitive-intruder-alarm

60
15. Contents beyond the Syllabus

IC FABRICATION PROCESS
A monolithic circuit, literally speaking, means a circuit fabricated from a single
stone or a single crystal. The origin of the word ·mono lithic' is from the Greek
word monos meaning 'single' and lithos meaning 'stone'. So monolithic integrated
circuits are, in fact, made in a single piece of single crystal silicon.
The most significant advantage of integrated circuit of reducing the cost of
production of electronic circuits due to batch production can be easily visualized
by a simple example. A standard 10 cm diameter wafer can be divided into
approximately 8000 rectangular cpips of sides 1 mm. Each IC chip may contain as
few aa tens of components to several thousand components. And if 10 such
wafers are processed in one batch, we can make 80,000 !Cs simultaneously. Many
chips so produced will be faulty due to imperfection in the manufacturing process.
Even if the yield (percentage of fault free chips/wafer) is only 20 percent, it can
be seen that 16,000 good chips are produced in a single batch .
The fabrication of discrete devices such as transistor, diode or an integrated circuit
in general can be done by the same technology. The various processes usually
take place through a single plane and there fore. The technology is referred to as
planar technology. A simple circuit when fabricated by silicon planar technology
will have the cross-sectional view shown in next Figure.
BASIC PLANAR PROCESSES
The basic processes used to fabricate ICs using silicon planar technology can be
categorised as follows:
Silicon wafer (substrate) preparation
Epitaxial growth
Oxidation
Photolithography
Diffusion
Ion implantation
Isolation technique
Metallization
Assembly processing and packaging

61
An IC in general, consists of four distinct layers, as follows:
Layer No. 1(- 400 µm): It is a p-typ e silicon substrate upon which the integrated
circuit is fabricated.
Layer No. 2 (- 5-25 µm): It is a thin n-type material grown as a single crystal
extension of the substrate using epitaxial deposition technique. All active and
passive components are fabricated within this layer using selective diffusion of
impurities.
Layer No. 3 (0.02-2µm): is a very thin Si02 layer for preventing diffusion of
impurities wherever not required using photolithographic technique.
Layer No. 4 (- lµm): is an aluminium-layer used for obtaining interconnection
between components.

Fig. A typical circuit

Fig.Complete cross "Sectional view of the circuit in above figure transformed into
monolithic form
 16. Assessment Schedule

Sl Examination Proposed Date Actual Date

N
o

1 First Internal Assessment Test 12.01.2024

2 Second Internal Assessment 01.04.2024

Test

3 Model Exam 20.02.2024

17. Prescribed Text Books & Reference Books

TEXT BOOKS:
D.Roy Choudhry, Shail B Jain, Linear Integrated Circuits,
5thEdition, New Age International Pvt. Ltd., 2020.
Sergio Franco, Design with Operational Amplifiers and
Analog Integrated Circuits, 4th Edition, TMH, 2016.
REFERENCES:
Ramakant A. Gayakwad, ―OP-AMP and Linear ICs‖, 4th Edition, Prentice Hall /
Ramakant A. Gayakwad, Op-amp and Linear ICs, 4th
Edition, Prentice Hall / Pearson Education, 2015.
Robert F.Coughlin, Frederick F.Driscoll, Operational Amplifiers
and Linear Integrated Circuits, 6th Edition, PHI, 2015.
Gray and Meyer, Analysis and Design of Analog Integrated
Circuits, 5th Edition, Wiley International, 2009.
William D.Stanley, Operational Amplifiers with Linear
Integrated Circuits, 4th
Edition, Pearson Education,2004.
Salivahanan S and Kanchana Bhaaskaran V S, Linear
Integrated Circuits, 3rd Edition, McGraw Hill Education, 2018.

NPTEL LINKS:
https://nptel.ac.in/courses/108/108/108108111/

64
18. Mini Project suggestions

MINI PROJECTS LIST

S.No Name of The Project

1. Electronics Thermometer using Op-amp 741 IC

2. Electronic Fuse using op-amp 741

S.No Name of The Project

1. Sound operational intruder using op-amp 741

2. Temperature deviation indicator using op-amp

S.No Name of The Project

1. Operational amplifier 741 tester

2. Automatic Light operated switch using LDR and 741

65
18. Mini Project suggestions

MINI PROJECTS LIST

S.No Name of The Project

1. Electronic Fuse Using Op-amp 741

2. Automatic light Operated Switch using LDR and 741

S.No Name of The Project

1. Electronic Thermometer Circuit using IC741

2. Operational Amplifier IC741 Tester

66
 Example for MINI PROJECT Circuit Description DIY Headphone
Amplifier using 741 IC

Circuit Description DIY Headphone Amplifier using 741 IC

The heart of the circuit headphone amplifier is op-amp 741 which provide suitable
gain where the transistor T1 and T2 are used to drive low impedance headphone.
The biasing of transistor is provided by diode D1 and D2 to reduce
crossover distortion. The low frequency response is detected by capacitor C4 and
is so chosen to give lower cut-off frequency of about 20 Hz with an 8-ohm load.
The input of this circuit is connected to preamplifier circuit or any other source
must delivering 100mV to 2.5V peak-to-peak with high output impedance.
Variable resistor VR1 is used to control volume. In case even with the
potentiometer at the maximum level the output is not sufficiently high then
increase the value of resistor R3.

PARTS
ResistorLIST OF DIY± 5%
(all ¼-watt, HEADPHONE
Carbon) AMPLIFIER USING 741 IC

R1, R2, R7 = 47 KΩ
R3 = 220 KΩ
R4, R5 = 4.7 KΩ
R6 = 22Ω
VR1 = 10 KΩ

Capacitors

C2 = 1 µF, 10V (Electrolytic capacitor)

C3, C4 = 10 µF, 10V (Electrolytic capacitor)

Semiconductors

IC1 = 741 (General purpose operational amplifier)

T1 = BC548 (general-purpose NPN bipolar junction transistor)
T2 = BC558 (Audio amplifier silicon PNP transistor)
D1, D2 = 1N4148 (Small Signal Diode)

Miscellaneous

LS1 = Headphone
 Thank you

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