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ORCIDNarayanan Vijaykrishnan
Vijaykrishnan Narayanan
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- affiliation: Penn State, University Park, USA
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2020 – today
- 2024
[j140]Tianyi Shen
, Cyan Subhra Mishra, Jack Sampson, Mahmut Taylan Kandemir, Vijaykrishnan Narayanan:
An Efficient Edge-Cloud Partitioning of Random Forests for Distributed Sensor Networks. IEEE Embed. Syst. Lett. 16(1): 21-24 (2024)- [j139]Ikenna Okafor, Akshay Krishna Ramanathan, Nagadastagiri Challapalle, Zheyu Li, Vijaykrishnan Narayanan:
Fusing In-storage and Near-storage Acceleration of Convolutional Neural Networks. ACM J. Emerg. Technol. Comput. Syst. 20(1): 1:1-1:22 (2024) - [j138]Guodong Yin, Yiming Chen, Mufeng Zhou, Wenjun Tang, Mingyen Lee, Zekun Yang, Tianyu Liao, Xirui Du, Vijaykrishnan Narayanan, Huazhong Yang, Hongyang Jia, Yongpan Liu, Xueqing Li:
Cramming More Weight Data Onto Compute-in-Memory Macros for High Task-Level Energy Efficiency Using Custom ROM With 3984-kb/mm2 Density in 65-nm CMOS. IEEE J. Solid State Circuits 59(6): 1912-1925 (2024) - [j137]Yiming Chen, Mingyen Lee, Guohao Dai, Mufeng Zhou, Nagadastagiri Challapalle, Tianyi Wang, Yao Yu, Yongpan Liu, Yu Wang, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li:
GRAPHIC: Gather and Process Harmoniously in the Cache With High Parallelism and Flexibility. IEEE Trans. Emerg. Top. Comput. 12(1): 84-96 (2024) - [j136]Taixin Li, Boran Sun, Hongtao Zhong, Yixin Xu, Vijaykrishnan Narayanan, Liang Shi, Tianyi Wang, Yao Yu, Thomas Kämpfe, Kai Ni, Huazhong Yang, Xueqing Li:
ProtFe: Low-Cost Secure Power Side-Channel Protection for General and Custom FeFET-Based Memories. ACM Trans. Design Autom. Electr. Syst. 29(1): 3:1-3:18 (2024) - [j135]Jianfeng Wang, Zhonghao Chen, Jiahao Zhang, Yixin Xu, Tongguang Yu, Ziheng Zheng, Enze Ye, Sumitha George, Huazhong Yang, Yongpan Liu, Kai Ni, Vijaykrishnan Narayanan, Xueqing Li:
A Module-Level Configuration Methodology for Programmable Camouflaged Logic. ACM Trans. Design Autom. Electr. Syst. 29(2): 39:1-39:31 (2024) - [j134]S. Sivakumar, John Jose, Vijaykrishnan Narayanan:
Enhancing Lifetime and Performance of MLC NVM Caches Using Embedded Trace Buffers. ACM Trans. Design Autom. Electr. Syst. 29(3): 58:1-58:24 (2024) - [c389]Yiming Chen, Guodong Yin, Hongtao Zhong, Mingyen Lee, Huazhong Yang, Sumitha George, Vijaykrishnan Narayanan, Xueqing Li:
ZEBRA: A Zero-Bit Robust-Accumulation Compute-In-Memory Approach for Neural Network Acceleration Utilizing Different Bitwise Patterns. ASPDAC 2024: 153-158 - [c388]Yue Pan, Minxuan Zhou, Chonghan Lee, Zheyu Li, Rishika Kushwah, Vijaykrishnan Narayanan, Tajana Rosing:
PRIMATE: Processing in Memory Acceleration for Dynamic Token-pruning Transformers. ASPDAC 2024: 557-563 - [c387]Anusha Devulapally, Md Fahim Faysal Khan, Siddharth Advani, Vijaykrishnan Narayanan:
Multi-Modal Fusion of Event and RGB for Monocular Depth Estimation Using a Unified Transformer-based Architecture. CVPR Workshops 2024: 2081-2089 - [c386]Philip Wootaek Shin, Ajay Narayanan Sridhar, Jack Sampson, Vijaykrishnan Narayanan:
A Generative Exploration of Cuisine Transfer. CVPR Workshops 2024: 3732-3740 - [c385]Taixin Li, Hongtao Zhong, Juejian Wu, Thomas Kämpfe, Kai Ni, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li:
CafeHD: A Charge-Domain FeFET-Based Compute-in-Memory Hyperdimensional Encoder with Hypervector Merging. DATE 2024: 1-6 - [c384]Jianfeng Wang, Shuwen Deng, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li:
TroScan: Enhancing On-Chip Delivery Resilience to Physical Attack Through Frequency-Triggered Key Generation. DATE 2024: 1-6 - [c383]Cyan Subhra Mishra, Jack Sampson, Mahmut Taylan Kandemir, Vijaykrishnan Narayanan, Chita R. Das:
Usas: A Sustainable Continuous-Learning' Framework for Edge Servers. HPCA 2024: 891-907 - [c382]Mohammad Khairul Bashar, Zheyu Li, Vijaykrishnan Narayanan, Nikhil Shukla:
An FPGA-based Max-K-Cut Accelerator Exploiting Oscillator Synchronization Model. ISQED 2024: 1-8 - [c381]Sadia Anjum Tumpa, Anusha Devulapally, Matthew Brehove, Espoir Kyubwa, Vijaykrishnan Narayanan:
SNN-ANN Hybrid Networks for Embedded Multimodal Monocular Depth Estimation. ISVLSI 2024: 198-203 - [c380]Amit Puri, Kartheek Bellamkonda, Kailash Narreddy, John Jose, Venkatesh Tamarapalli, Vijaykrishnan Narayanan:
DRackSim: Simulating CXL-enabled Large-Scale Disaggregated Memory Systems. SIGSIM-PADS 2024: 3-14 - [i26]Zijian Zhao, Sola Woo, Khandker Akif Aabrar, Sharadindu Gopal Kirtania, Zhouhang Jiang, Shan Deng, Yi Xiao, Halid Mulaosmanovic, Stefan Dünkel, Dominik Kleimaier, Steven Soss, Sven Beyer, Rajiv V. Joshi, Scott Meninger, Mohamed Mohamed, Kijoon Kim, Jongho Woo, Suhwan Lim, Kwangsoo Kim, Wanki Kim, Daewon Ha, Vijaykrishnan Narayanan, Suman Datta, Shimeng Yu, Kai Ni:
Paving the Way for Pass Disturb Free Vertical NAND Storage via A Dedicated and String-Compatible Pass Gate. CoRR abs/2403.04981 (2024) - [i25]Philip Wootaek Shin, Jihyun Janice Ahn, Wenpeng Yin, Jack Sampson, Vijaykrishnan Narayanan:
Can Prompt Modifiers Control Bias? A Comparative Analysis of Text-to-Image Generative Models. CoRR abs/2406.05602 (2024) - [i24]Cyan Subhra Mishra, Jack Sampson, Mahmut Taylan Kandmeir, Vijaykrishnan Narayanan, Chita R. Das:
Synergistic and Efficient Edge-Host Communication for Energy Harvesting Wireless Sensor Networks. CoRR abs/2408.14379 (2024) - [i23]Pingyi Huo, Anusha Devulapally, Hasan Al Maruf, Minseo Park, Krishnakumar Nair, Meena Arunachalam, Gulsum Gudukbay Akbulut, Mahmut Taylan Kandemir, Vijaykrishnan Narayanan:
PIFS-Rec: Process-In-Fabric-Switch for Large-Scale Recommendation System Inferences. CoRR abs/2409.16633 (2024) - 2023
- [j133]Abhijeet Kumar, Samuel Abrams, Abhishek Kumar, Vijaykrishnan Narayanan:
STAR: Efficient SpatioTemporal Modeling for Action Recognition. Circuits Syst. Signal Process. 42(2): 705-723 (2023) - [j132]Wenjun Tang, Mingyen Lee, Juejian Wu, Yixin Xu, Yao Yu, Yongpan Liu, Kai Ni, Yu Wang, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li:
FeFET-Based Logic-in-Memory Supporting SA-Free Write-Back and Fully Dynamic Access With Reduced Bitline Charging Activity and Recycled Bitline Charge. IEEE Trans. Circuits Syst. I Regul. Pap. 70(6): 2398-2411 (2023) - [j131]Yiming Chen, Yushen Fu, Mingyen Lee, Sumitha George, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li:
FAST: A Fully-Concurrent Access SRAM Topology for High Row-Wise Parallelism Applications Based on Dynamic Shift Operations. IEEE Trans. Circuits Syst. II Express Briefs 70(4): 1605-1609 (2023) - [c379]Jianfeng Wang, Zhonghao Chen, Yiming Chen, Yixin Xu, Tianyi Wang, Yao Yu, Vijaykrishnan Narayanan, Sumitha George, Huazhong Yang, Xueqing Li:
WeightLock: A Mixed-Grained Weight Encryption Approach Using Local Decrypting Units for Ciphertext Computing in DNN Accelerators. AICAS 2023: 1-5 - [c378]Shamiul Alam, Jack Hutchins, Md. Shafayat Hossain, Kai Ni, Vijaykrishnan Narayanan, Ahmedullah Aziz:
Cryogenic In-Memory Matrix-Vector Multiplication using Ferroelectric Superconducting Quantum Interference Device (FE-SQUID). DAC 2023: 1-6 - [c377]Mingyen Lee, Wenjun Tang, Yiming Chen, Juejian Wu, Hongtao Zhong, Yixin Xu, Yongpan Liu, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li:
Victor: A Variation-resilient Approach Using Cell-Clustered Charge-domain computing for High-density High-throughput MLC CiM. DAC 2023: 1-6 - [c376]Vijaykrishnan Narayanan:
Lightning Talk: Can memory technologies meet demands of data abundant applications? DAC 2023: 1-2 - [c375]Hongtao Zhong, Zhonghao Chen, Wenqin Huangfu, Chen Wang, Yixin Xu, Tianyi Wang, Yao Yu, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li:
ASMCap: An Approximate String Matching Accelerator for Genome Sequence Analysis Based on Capacitive Content Addressable Memory. DAC 2023: 1-6 - [c374]Chonghan Lee, Rita Brugarolas Brufau, Ke Ding, Vijaykrishnan Narayanan:
Token Adaptive Vision Transformer with Efficient Deployment for Fine-Grained Image Recognition. DATE 2023: 1-6 - [c373]Kai Ni, Yi Xiao, Shan Deng, Vijaykrishnan Narayanan:
Computational Associative Memory Powered by Ferroelectric Memory. DRC 2023: 1-2 - [c372]Juejian Wu, Tianyu Liao, Taixin Li, Yixin Xu, Vijaykrishnan Narayanan, Yongpan Liu, Huazhong Yang, Xueqing Li:
Lowering Latency of Embedded Memory by Exploiting In-Cell Victim Cache Hierarchy Based on Emerging Multi-Level Memory Devices. ICCAD 2023: 1-9 - [c371]Tianyi Shen, Chonghan Lee, Vijaykrishnan Narayanan:
Multi-Exit Vision Transformer with Custom Fine-Tuning for Fine-Grained Image Recognition. ICIP 2023: 2830-2834 - [c370]Zeinab Hakimi, Vijaykrishnan Narayanan:
Fine-to-Coarse Object Classification of Very Large Images. ICIP 2023: 3498-3502 - [c369]Taixin Li, Hongtao Zhong, Sumitha George, Vijaykrishnan Narayanan, Liang Shi, Huazhong Yang, Xueqing Li:
Design Exploration of Dynamic Multi-Level Ternary Content-Addressable Memory Using Nanoelectromechanical Relays. ISVLSI 2023: 1-6 - [c368]Sadia Anjum Tumpa, Sonali Singh, Md Fahim Faysal Khan, Mahmut Taylan Kandemir, Vijaykrishnan Narayanan, Chita R. Das:
Federated Learning with Spiking Neural Networks in Heterogeneous Systems. ISVLSI 2023: 1-6 - [c367]Yi Xiao, Yixin Xu, Shan Deng, Zijian Zhao, Sumitha George, Kai Ni, Vijaykrishnan Narayanan:
A Compact Ferroelectric 2T-(n+1)C Cell to Implement AND-OR Logic in Memory. ISVLSI 2023: 1-6 - [c366]Hongtao Zhong, Yu Zhu, Longfei Luo, Taixin Li, Chen Wang, Yixin Xu, Tianyi Wang, Yao Yu, Vijaykrishnan Narayanan, Yongpan Liu, Liang Shi, Huazhong Yang, Xueqing Li:
Fe-GCN: A 3D FeFET Memory Based PIM Accelerator for Graph Convolutional Networks. ISVLSI 2023: 1-6 - [c365]Yi Zheng, Joshua Fixelle, Pingyi Huo, Mircea Stan, Michael P. Mesnier, Vijaykrishnan Narayanan:
ISVABI: In-Storage Video Analytics Engine with Block Interface. LCTES 2023: 111-121 - [c364]Samuel Abrams, Vijaykrishnan Narayanan:
Extending Action Recognition in the Compressed Domain. VLSID 2023: 246-251 - [i22]Hongtao Zhong, Zhonghao Chen, Wenqin Huangfu, Chen Wang, Yixin Xu, Tianyi Wang, Yao Yu, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li:
ASMCap: An Approximate String Matching Accelerator for Genome Sequence Analysis Based on Capacitive Content Addressable Memory. CoRR abs/2302.07478 (2023) - [i21]Zijian Zhao, Shan Deng, Swetaki Chatterjee, Zhouhang Jiang, Muhammad Shaffatul Islam, Yi Xiao, Yixin Xu, Scott Meninger, Mohamed Mohamed, Rajiv V. Joshi, Yogesh Singh Chauhan, Halid Mulaosmanovic, Stefan Dünkel, Dominik Kleimaier, Sven Beyer, Hussam Amrouch, Vijaykrishnan Narayanan, Kai Ni:
Powering Disturb-Free Reconfigurable Computing and Tunable Analog Electronics with Dual-Port Ferroelectric FET. CoRR abs/2305.01484 (2023) - [i20]Amit Puri, John Jose, Tamarapalli Venkatesh, Vijaykrishnan Narayanan:
DRackSim: Simulator for Rack-scale Memory Disaggregation. CoRR abs/2305.09977 (2023) - [i19]Yixin Xu, Yi Xiao, Zijian Zhao, Franz Müller, Alptekin Vardar, Xiao Gong, Sumitha George, Thomas Kämpfe, Vijaykrishnan Narayanan, Kai Ni:
Embedding Security into Ferroelectric FET Array via In-Situ Memory Operation. CoRR abs/2306.01863 (2023) - [i18]Md. Mazharul Islam, Shamiul Alam, Mohammad Adnan Jahangir, Garrett S. Rose, Suman Datta, Vijaykrishnan Narayanan, Sumeet Kumar Gupta, Ahmedullah Aziz:
Reimagining Sense Amplifiers: Harnessing Phase Transition Materials for Current and Voltage Sensing. CoRR abs/2308.15756 (2023) - 2022
- [j130]Sooyeon Lee, Nelson Daniel Troncoso Aldas, Chonghan Lee, Mary Beth Rosson, John M. Carroll, Vijaykrishnan Narayanan:
AIGuide: Augmented Reality Hand Guidance in a Visual Prosthetic. ACM Trans. Access. Comput. 15(2): 12:1-12:32 (2022) - [j129]Hanlin Lu, Ting He, Shiqiang Wang, Changchang Liu, Mehrdad Mahdavi, Vijaykrishnan Narayanan, Kevin S. Chan, Stephen Pasteris:
Communication-Efficient $k$k-Means for Edge-Based Machine Learning. IEEE Trans. Parallel Distributed Syst. 33(10): 2509-2523 (2022) - [j128]Xiaoyang Ma, Hongtao Zhong, Nuo Xiu, Yiming Chen, Guodong Yin, Vijaykrishnan Narayanan, Yongpan Liu, Kai Ni, Huazhong Yang, Xueqing Li:
CapCAM: A Multilevel Capacitive Content Addressable Memory for High-Accuracy and High-Scalability Search and Compute Applications. IEEE Trans. Very Large Scale Integr. Syst. 30(11): 1770-1782 (2022) - [c363]Chonghan Lee, Md Fahim Faysal Khan, Rita Brugarolas Brufau, Ke Ding, Vijaykrishnan Narayanan:
Token and Head Adaptive Transformers for Efficient Natural Language Processing. COLING 2022: 4575-4584 - [c362]Akshay Krishna Ramanathan, Sara Mahdizadeh-Shahri, Yi Xiao, Vijaykrishnan Narayanan:
Achieving Crash Consistency by Employing Persistent L1 Cache. DATE 2022: 1407-1412 - [c361]Shamiul Alam, Md. Mazharul Islam, Md. Shafayat Hossain, Kai Ni, Vijaykrishnan Narayanan, Ahmedullah Aziz:
Cryogenic Memory Array based on Ferroelectric SQUID and Heater Cryotron. DRC 2022: 1-2 - [c360]Sethu Jose, John Sampson, Vijaykrishnan Narayanan, Mahmut Taylan Kandemir:
A Scheduling Framework for Decomposable Kernels on Energy Harvesting IoT Edge Nodes. ACM Great Lakes Symposium on VLSI 2022: 91-96 - [c359]Jianfeng Wang, Nuo Xiu, Juejian Wu, Yiming Chen, Yanan Sun, Huazhong Yang, Vijaykrishnan Narayanan, Sumitha George, Xueqing Li:
An 8T/Cell FeFET-Based Nonvolatile SRAM with Improved Density and Sub-fJ Backup and Restore Energy. ISCAS 2022: 3408-3412 - [c358]Nagadastagiri Challapalle, Vijaykrishnan Narayanan:
Performance Evaluation of Video Analytics Workloads on Emerging Processing-In-Memory Architectures. ISVLSI 2022: 158-163 - [c357]Jian Zhang, Jian Tang, Yiran Chen, Jie Liu, Jieping Ye, Marilyn Wolf, Vijaykrishnan Narayanan, Mani B. Srivastava, Michael I. Jordan, Victor Bahl:
The 5th Artificial Intelligence of Things (AIoT) Workshop. KDD 2022: 4912-4913 - [c356]Yi Zheng, Joshua Fixelle, Nagadastagiri Challapalle, Pingyi Huo, Zhaoyan Shen, Zili Shao, Mircea Stan, Vijaykrishnan Narayanan:
ISKEVA: in-SSD key-value database engine for video analytics applications. LCTES 2022: 50-60 - [c355]Sonali Singh, Anup Sarma, Sen Lu, Abhronil Sengupta, Mahmut T. Kandemir, Emre Neftci, Vijaykrishnan Narayanan, Chita R. Das:
Skipper: Enabling efficient SNN training through activation-checkpointing and time-skipping. MICRO 2022: 565-581 - [c354]Md Fahim Faysal Khan, Anusha Devulapally, Siddharth Advani, Vijaykrishnan Narayanan:
Robust Multimodal Depth Estimation using Transformer based Generative Adversarial Networks. ACM Multimedia 2022: 3559-3568 - [c353]Zhouhang Jiang, Yi Xiao, Swetaki Chatterjee, Halid Mulaosmanovic, Stefan Dünkel, Steven Soss, Sven Beyer, Rajiv V. Joshi, Yogesh Singh Chauhan, Hussam Amrouch, Vijaykrishnan Narayanan, Kai Ni:
Asymmetric Double-Gate Ferroelectric FET to Decouple the Tradeoff Between Thickness Scaling and Memory Window. VLSI Technology and Circuits 2022: 395-396 - [i17]Cyan Subhra Mishra, Jack Sampson, Mahmut Taylan Kandemir, Vijaykrishnan Narayanan:
Seeker: Synergizing Mobile and Energy Harvesting Wearable Sensors for Human Activity Recognition. CoRR abs/2204.13106 (2022) - [i16]Yiming Chen, Yushen Fu, Mingyen Lee, Sumitha George, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li:
FAST: A Fully-Concurrent Access Technique to All SRAM Rows for Enhanced Speed and Energy Efficiency in Data-Intensive Applications. CoRR abs/2205.11088 (2022) - [i15]Antik Mallick, Zijian Zhao, Mohammad Khairul Bashar, Shamiul Alam, Md. Mazharul Islam, Yi Xiao, Yixin Xu, Ahmedullah Aziz, Vijaykrishnan Narayanan, Kai Ni, Nikhil Shukla:
CMOS-Compatible Ising Machines built using Bistable Latches Coupled through Ferroelectric Transistor Arrays. CoRR abs/2205.14729 (2022) - [i14]Jianfeng Wang, Zhonghao Chen, Jiahao Zhang, Yixin Xu, Tongguang Yu, Enze Ye, Ziheng Zheng, Huazhong Yang, Sumitha George, Yongpan Liu, Vijaykrishnan Narayanan, Xueqing Li:
ALL-MASK: A Reconfigurable Logic Locking Method for Multicore Architecture with Sequential-Instruction-Oriented Key. CoRR abs/2206.08087 (2022) - [i13]Yiming Chen, Guohao Dai, Mufeng Zhou, Mingyen Lee, Nagadastagiri Challapalle, Guodong Yin, Zekun Yang, Yongpan Liu, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li:
GRAPHIC: GatheR-And-Process in Highly parallel with In-SSD Compression Architecture in Very Large-Scale Graph. CoRR abs/2208.08600 (2022) - [i12]Xinrui Guo, Xiaoyang Ma, Franz Müller, Kai Ni, Thomas Kämpfe, Yongpan Liu, Vijaykrishnan Narayanan, Xueqing Li:
Ferroelectric FET-based strong physical unclonable function: a low-power, high-reliable and reconfigurable solution for Internet-of-Things security. CoRR abs/2208.14678 (2022) - [i11]Yixin Xu, Zijian Zhao, Yi Xiao, Tongguang Yu, Halid Mulaosmanovic, Dominik Kleimaier, Stefan Dünkel, Sven Beyer, Xiao Gong, Rajiv V. Joshi, X. Sharon Hu, Shixian Wen, Amanda Sofie Rios, Kiran Lekkala, Laurent Itti, Eric Homan, Sumitha George, Vijaykrishnan Narayanan, Kai Ni:
Ferroelectric FET based Context-Switching FPGA Enabling Dynamic Reconfiguration for Adaptive Deep Learning Machines. CoRR abs/2212.00089 (2022) - [i10]Shamiul Alam, Md. Shafayat Hossain, Kai Ni, Vijaykrishnan Narayanan, Ahmedullah Aziz:
Voltage-controlled Cryogenic Boolean Logic Family Based on Ferroelectric SQUID. CoRR abs/2212.08202 (2022) - 2021
- [j127]Lizy Kurian John, Vijaykrishnan Narayanan:
Microprocessor at 50: A Time to Celebrate and Energize for the Future. IEEE Micro 41(6): 10-12 (2021) - [j126]Lizy Kurian John, Vijaykrishnan Narayanan:
Microprocessor at 50: Industry Leaders Speak. IEEE Micro 41(6): 13-15 (2021) - [j125]Bagus Hanindhito, Karthik Swaminathan, Vijaykrishnan Narayanan, Lizy Kurian John:
Intel Wins in Four Decades, but AMD Catches Up. IEEE Micro 41(6): 168-171 (2021) - [j124]Keni Qiu, Nicholas Jao, Kunyu Zhou, Yongpan Liu, Jack Sampson, Mahmut Taylan Kandemir, Vijaykrishnan Narayanan:
MaxTracker: Continuously Tracking the Maximum Computation Progress for Energy Harvesting ReRAM-based CNN Accelerators. ACM Trans. Embed. Comput. Syst. 20(5s): 78:1-78:23 (2021) - [j123]Hongtao Zhong, Shengjie Cao, Li Jiang, Xia An, Vijaykrishnan Narayanan, Yongpan Liu, Huazhong Yang, Xueqing Li:
DyTAN: Dynamic Ternary Content Addressable Memory Using Nanoelectromechanical Relays. IEEE Trans. Very Large Scale Integr. Syst. 29(11): 1981-1993 (2021) - [j122]Nicholas Jao, Akshay Krishna Ramanathan, John Sampson, Vijaykrishnan Narayanan:
Sparse Vector-Matrix Multiplication Acceleration in Diode-Selected Crossbars. IEEE Trans. Very Large Scale Integr. Syst. 29(12): 2186-2196 (2021) - [c352]Siddhartha Balakrishna Rai, Anand Sivasubramaniam, Adithya Kumar, Prasanna Venkatesh Rengasamy, Vijaykrishnan Narayanan, Ameen Akel, Sean Eilert:
Design space for scaling-in general purpose computing within the DDR DRAM hierarchy for map-reduce workloads. CF 2021: 113-123 - [c351]Zeinab Hakimi, Vijaykrishnan Narayanan:
Resolution-Aware Deep Multi-View Camera Systems. DATE 2021: 414-417 - [c350]Cyan Subhra Mishra, Jack Sampson, Mahmut Taylan Kandemir, Vijaykrishnan Narayanan:
Origin: Enabling On-Device Intelligence for Human Activity Recognition Using Energy Harvesting Wireless Sensor Networks. DATE 2021: 1414-1419 - [c349]Shan Deng, Zijian Zhao, Santosh Kurinec, Kai Ni, Yi Xiao, Tongguang Yu, Vijaykrishnan Narayanan:
Overview of Ferroelectric Memory Devices and Reliability Aware Design Optimization. ACM Great Lakes Symposium on VLSI 2021: 473-478 - [c348]Mohammad Khairul Bashar, Jaykumar Vaidya, R. S. Surya Kanthi, Chonghan Lee, Feng Shi, Vijaykrishnan Narayanan, Nikhil Shukla:
Ferroelectric-based Accelerators for Computationally Hard Problems. ACM Great Lakes Symposium on VLSI 2021: 485-489 - [c347]Helena Caminal, Kailin Yang, Srivatsa Srinivasa, Akshay Krishna Ramanathan, Khalid Al-Hawaj, Tianshu Wu, Vijaykrishnan Narayanan, Christopher Batten, José F. Martínez:
CAPE: A Content-Addressable Processing Engine. HPCA 2021: 557-569 - [c346]Nagadastagiri Challapalle, Karthik Swaminathan, Nandhini Chandramoorthy, Vijaykrishnan Narayanan:
Crossbar based Processing in Memory Accelerator Architecture for Graph Convolutional Networks. ICCAD 2021: 1-9 - [c345]Xiao Liu, Minxuan Zhou, Rachata Ausavarungnirun, Sean Eilert, Ameen Akel, Tajana Rosing, Vijaykrishnan Narayanan, Jishen Zhao:
FPRA: A Fine-grained Parallel RRAM Architecture. ISLPED 2021: 1-6 - [c344]Sonali Singh, Anup Sarma, Sen Lu, Abhronil Sengupta, Vijaykrishnan Narayanan, Chita R. Das:
Gesture-SNN: Co-optimizing accuracy, latency and energy of SNNs for neuromorphic vision sensors. ISLPED 2021: 1-6 - [c343]Srivatsa Srinivasa, Akshay Krishna Ramanathan, Jainaveen Sundaram, Dileep Kurian, Srinivasan Gopal, Nilesh Jain, Anuradha Srinivasan, Ravi R. Iyer, Vijaykrishnan Narayanan, Tanay Karnik:
Trends and Opportunities for SRAM Based In-Memory and Near-Memory Computation. ISQED 2021: 547-552 - [c342]Jian Zhang, Jian Tang, Yiran Chen, Jie Liu, Jieping Ye, Marilyn Wolf, Vijaykrishnan Narayanan, Mani Srivastava, Michael I. Jordan, Victor Bahl:
The 4th Artificial Intelligence of Things (AIoT) Workshop. KDD 2021: 4179-4180 - [c341]Md Fahim Faysal Khan, Nelson Daniel Troncoso Aldas, Abhishek Kumar, Siddharth Advani, Vijaykrishnan Narayanan:
Sparse to Dense Depth Completion using a Generative Adversarial Network with Intelligent Sampling Strategies. ACM Multimedia 2021: 5528-5536 - [c340]Vineetha Govindaraj, Sumitha George, Mahmut T. Kandemir, John Sampson, Vijaykrishnan Narayanan:
PowerPrep: A power management proposal for user-facing datacenter workloads. NAS 2021: 1-7 - [i9]Hanlin Lu, Ting He, Shiqiang Wang, Changchang Liu, Mehrdad Mahdavi, Vijaykrishnan Narayanan, Kevin S. Chan, Stephen Pasteris:
Communication-efficient k-Means for Edge-based Machine Learning. CoRR abs/2102.04282 (2021) - [i8]Feng Shi, Chonghan Lee, Liang Qiu, Yizhou Zhao, Tianyi Shen, Shivran Muralidhar, Tian Han, Song-Chun Zhu, Vijaykrishnan Narayanan:
STAR: Sparse Transformer-based Action Recognition. CoRR abs/2107.07089 (2021) - [i7]Feng Shi, Chonghan Lee, Mohammad Khairul Bashar, Nikhil Shukla, Song-Chun Zhu, Vijaykrishnan Narayanan:
Transformer-based Machine Learning for Fast SAT Solvers and Logic Synthesis. CoRR abs/2107.07116 (2021) - [i6]Anup Sarma, Sonali Singh, Huaipan Jiang, Ashutosh Pattnaik, Asit K. Mishra, Vijaykrishnan Narayanan, Mahmut T. Kandemir, Chita R. Das:
Exploiting Activation based Gradient Output Sparsity to Accelerate Backpropagation in CNNs. CoRR abs/2109.07710 (2021) - [i5]Mohammad Khairul Bashar, Jaykumar Vaidya, Antik Mallick, R. S. Surya Kanthi, Shamiul Alam, Nazmul Amin, Chonghan Lee, Feng Shi, Ahmedullah Aziz, Vijaykrishnan Narayanan, Nikhil Shukla:
An Oscillator-based MaxSAT solver. CoRR abs/2109.09897 (2021) - [i4]Tongguang Yu, Yixin Xu, Shan Deng, Zijian Zhao, Nicholas Jao, You Sung Kim, Stefan Dünkel, Sven Beyer, Kai Ni, Sumitha George, Vijaykrishnan Narayanan:
Hardware Functional Obfuscation With Ferroelectric Active Interconnects. CoRR abs/2110.03855 (2021) - 2020
- [j121]Skyler Anderson, Nagadastagiri Challapalle, John Sampson, Vijaykrishnan Narayanan:
Adaptive Neural Network Architectures for Power Aware Inference. IEEE Des. Test 37(2): 66-75 (2020) - [j120]Hanlin Lu, Ming-Ju Li, Ting He, Shiqiang Wang, Vijaykrishnan Narayanan, Kevin S. Chan:
Robust Coreset Construction for Distributed Machine Learning. IEEE J. Sel. Areas Commun. 38(10): 2400-2417 (2020) - [j119]S. R. Swamy Saranam Chongala, Sumitha George, Hariram Thirucherai Govindarajan, Jagadish Kotra, Madhu Mutyam, John Sampson, Mahmut T. Kandemir, Vijaykrishnan Narayanan:
Optimization of Intercache Traffic Entanglement in Tagless Caches With Tiling Opportunities. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11): 3881-3892 (2020) - [j118]Hongtao Zhong, Mingyang Gu, Yu Wang, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li:
One-Shot Refresh: A Low-Power Low-Congestion Approach for Dynamic Memories. IEEE Trans. Circuits Syst. 67-II(12): 3402-3406 (2020) - [j117]Nagadastagiri Challapalle, Sahithi Rampalli, Nicholas Jao, Akshay Krishna Ramanathan, John Sampson, Vijaykrishnan Narayanan:
FARM: A Flexible Accelerator for Recurrent and Memory Augmented Neural Networks. J. Signal Process. Syst. 92(11): 1247-1261 (2020) - [c339]Nelson Daniel Troncoso Aldas, Sooyeon Lee, Chonghan Lee, Mary Beth Rosson, John M. Carroll, Vijaykrishnan Narayanan:
AIGuide: An Augmented Reality Hand Guidance Application for People with Visual Impairments. ASSETS 2020: 2:1-2:13 - [c338]Md Fahim Faysal Khan, Mohammad Mahdi Kamani, Mehrdad Mahdavi, Vijaykrishnan Narayanan:
Learning to Quantize Deep Neural Networks: A Competitive-Collaborative Approach. DAC 2020: 1-6 - [c337]Nagadastagiri Challapalle, Sahithi Rampalli, Makesh Chandran, Gurpreet S. Kalsi, Sreenivas Subramoney, John Sampson, Vijaykrishnan Narayanan:
PSB-RNN: A Processing-in-Memory Systolic Array Architecture using Block Circulant Matrices for Recurrent Neural Networks. DATE 2020: 180-185 - [c336]Zheyu Li, Nagadastagiri Challapalle, Akshay Krishna Ramanathan, Vijaykrishnan Narayanan:
IMC-Sort: In-Memory Parallel Sorting Architecture using Hybrid Memory Cube. ACM Great Lakes Symposium on VLSI 2020: 45-50 - [c335]Keni Qiu, Mengying Zhao, Zhenge Jia, Jingtong Hu, Chun Jason Xue, Kaisheng Ma, Xueqing Li, Yongpan Liu, Vijaykrishnan Narayanan:
Design Insights of Non-volatile Processors and Accelerators in Energy Harvesting Systems. ACM Great Lakes Symposium on VLSI 2020: 369-374 - [c334]Keni Qiu, Nicholas Jao, Mengying Zhao, Cyan Subhra Mishra, Gulsum Gudukbay, Sethu Jose, Jack Sampson, Mahmut Taylan Kandemir, Vijaykrishnan Narayanan:
ResiRCA: A Resilient Energy Harvesting ReRAM Crossbar-Based Accelerator for Intelligent Embedded Processors. HPCA 2020: 315-327 - [c333]Hanlin Lu, Ting He, Shiqiang Wang, Changchang Liu, Mehrdad Mahdavi, Vijaykrishnan Narayanan, Kevin S. Chan, Stephen Pasteris:
Communication-efficient k-Means for Edge-based Machine Learning. ICDCS 2020: 595-605 - [c332]Sonali Singh, Anup Sarma, Nicholas Jao, Ashutosh Pattnaik, Sen Lu, Kezhou Yang, Abhronil Sengupta, Vijaykrishnan Narayanan, Chita R. Das:
NEBULA: A Neuromorphic Spin-Based Ultra-Low Power Architecture for SNNs and ANNs. ISCA 2020: 363-376 - [c331]Nagadastagiri Challapalle, Sahithi Rampalli, Linghao Song, Nandhini Chandramoorthy, Karthik Swaminathan, John Sampson, Yiran Chen, Vijaykrishnan Narayanan:
GaaS-X: Graph Analytics Accelerator Supporting Sparse Data Representation using Crossbar Architectures. ISCA 2020: 433-445 - [c330]Mingyen Lee, Wenjun Tang, Bowen Xue, Juejian Wu, Mingyuan Ma, Yu Wang, Yongpan Liu, Deliang Fan, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li:
FeFET-based low-power bitwise logic-in-memory with direct write-back and data-adaptive dynamic sensing interface. ISLPED 2020: 127-132 - [c329]Sumitha George, Nicholas Jao, Akshay Krishna Ramanathan, Xueqing Li, Sumeet Kumar Gupta, John Sampson, Vijaykrishnan Narayanan:
Integrated CAM-RAM Functionality using Ferroelectric FETs. ISQED 2020: 81-86 - [c328]Eric Homan, Chonghan Lee, Jack Sampson, John P. Sustersic, Vijaykrishnan Narayanan:
DoubtNet: Using Semantic Context to Enable Adaptive Inference for the IoT. ISVLSI 2020: 586-591 - [c327]Nagadastagiri Challapalle, Makesh Chandran, Sahithi Rampalli, Vijaykrishnan Narayanan:
X-VS: Crossbar-Based Processing-in-Memory Architecture for Video Summarization. ISVLSI 2020: 592-597 - [c326]Akshay Krishna Ramanathan, Gurpreet S. Kalsi, Srivatsa Srinivasa, Tarun Makesh Chandran, Kamlesh R. Pillai, Om Ji Omer, Vijaykrishnan Narayanan, Sreenivas Subramoney:
Look-Up Table based Energy Efficient Processing in Cache Support for Neural Network Acceleration. MICRO 2020: 88-101 - [c325]Hanlin Lu, Changchang Liu, Shiqiang Wang, Ting He, Vijaykrishnan Narayanan, Kevin S. Chan, Stephen Pasteris:
Joint Coreset Construction and Quantization for Distributed Machine Learning. Networking 2020: 172-180
2010 – 2019
- 2019
- [j116]Xueqing Li, Juejian Wu, Kai Ni, Sumitha George, Kaisheng Ma, John Sampson, Sumeet Kumar Gupta, Yongpan Liu, Huazhong Yang, Suman Datta, Vijaykrishnan Narayanan:
Design of 2T/Cell and 3T/Cell Nonvolatile Memories with Emerging Ferroelectric FETs. IEEE Des. Test 36(3): 39-45 (2019) - [j115]Jinhang Choi, Zeinab Hakimi, John Sampson, Vijaykrishnan Narayanan:
Byzantine-Tolerant Inference in Distributed Deep Intelligent System: Challenges and Opportunities. IEEE J. Emerg. Sel. Topics Circuits Syst. 9(3): 509-519 (2019) - [j114]Vijaykrishnan Narayanan:
Going Vertical: The Future of Electronics. IEEE Micro 39(6): 6-7 (2019) - [j113]Arijit Raychowdhury, Abhinav Parihar, Gus Henry Smith, Vijaykrishnan Narayanan, György Csaba, Matthew Jerry, Wolfgang Porod, Suman Datta:
Computing With Networks of Oscillatory Dynamical Systems. Proc. IEEE 107(1): 73-89 (2019) - [j112]Srivatsa Rangachar Srinivasa, Akshay Krishna Ramanathan, Xueqing Li, Wei-Hao Chen, Sumeet Kumar Gupta, Meng-Fan Chang, Swaroop Ghosh, Jack Sampson, Vijaykrishnan Narayanan:
ROBIN: Monolithic-3D SRAM for Enhanced Robustness with In-Memory Computation Support. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(7): 2533-2545 (2019) - [j111]Yuhua Liang, Zhangming Zhu, Xueqing Li, Sumeet Kumar Gupta, Suman Datta, Vijaykrishnan Narayanan:
Utilization of Negative-Capacitance FETs to Boost Analog Circuit Performances. IEEE Trans. Very Large Scale Integr. Syst. 27(12): 2855-2860 (2019) - [c324]Jinhang Choi, Zeinab Hakimi, Philip Wootaek Shin, Jack Sampson, Vijaykrishnan Narayanan:
Context-Aware Convolutional Neural Network over Distributed System in Collaborative Computing. DAC 2019: 211 - [c323]Hanlin Lu, Ming-Ju Li, Ting He, Shiqiang Wang, Vijaykrishnan Narayanan, Kevin S. Chan:
Robust Coreset Construction for Distributed Machine Learning. GLOBECOM 2019: 1-6 - [c322]Md Fahim Faysal Khan, Nicholas Anton Jao, Changchi Shuai, Keni Qiu, Mehrdad Mahdavi, Vijaykrishnan Narayanan:
Mixed Precision Quantization Scheme for Re-configurable ReRAM Crossbars Targeting Different Energy Harvesting Scenarios. IFIPIoT 2019: 197-216 - [c321]Nicholas Jao, Akshay Krishna Ramanathan, Abhronil Sengupta, John Sampson, Vijaykrishnan Narayanan:
Programmable Non-Volatile Memory Design Featuring Reconfigurable In-Memory Operations. ISCAS 2019: 1-5 - [c320]Srivatsa Rangachar Srinivasa, Wei-Hao Chen, Yung-Ning Tu, Meng-Fan Chang, Jack Sampson, Vijaykrishnan Narayanan:
Monolithic-3D Integration Augmented Design Techniques for Computing in SRAMs. ISCAS 2019: 1-5 - [c319]Nicholas Jao, Srivatsa Srivinasa, Akshay Krishna Ramanathan, Minhwan Kim, John Sampson, Vijaykrishnan Narayanan:
Technology-Assisted Computing-In-Memory Design for Matrix Multiplication Workloads. NANOARCH 2019: 1-6 - [c318]Sandeep Krishna Thirumala, Arnab Raha, Vijaykrishnan Narayanan, Vijay Raghunathan, Sumeet Kumar Gupta:
Non-volatile Logic and Memory based on Reconfigurable Ferroelectric Transistors. NANOARCH 2019: 1-6 - [c317]Philip Wootaek Shin, Jack Sampson, Vijaykrishnan Narayanan:
Context-Aware Collaborative Object Recognition For Distributed Multi Camera Time Series Data. SoICT 2019: 154-161 - 2018
- [j110]Neel Gala, Sarada Krithivasan, Wei-Yu Tsai, Xueqing Li, Vijaykrishnan Narayanan, V. Kamakoti:
An Accuracy Tunable Non-Boolean Co-Processor Using Coupled Nano-Oscillators. ACM J. Emerg. Technol. Comput. Syst. 14(1): 1:1-1:28 (2018) - [j109]Kaisheng Ma, Jinyang Li, Xueqing Li, Yongpan Liu, Yuan Xie, Mahmut T. Kandemir, Jack Sampson, Vijaykrishnan Narayanan:
IAA: Incidental Approximate Architectures for Extremely Energy-Constrained Energy Harvesting Scenarios using IoT Nonvolatile Processors. IEEE Micro 38(4): 11-19 (2018) - [j108]Srivatsa Rangachar Srinivasa, Xueqing Li, Meng-Fan Chang, John Sampson, Sumeet Kumar Gupta, Vijaykrishnan Narayanan:
Compact 3-D-SRAM Memory With Concurrent Row and Column Data Access Capability Using Sequential Monolithic 3-D Integration. IEEE Trans. Very Large Scale Integr. Syst. 26(4): 671-683 (2018) - [j107]Sumitha George, Xueqing Li, Minli Julie Liao, Kaisheng Ma, Srivatsa Rangachar Srinivasa, Karthik Mohan, Ahmedullah Aziz, John Sampson, Sumeet Kumar Gupta, Vijaykrishnan Narayanan:
Symmetric 2-D-Memory Access to Multidimensional Data. IEEE Trans. Very Large Scale Integr. Syst. 26(6): 1040-1050 (2018) - [c316]Kaisheng Ma, Xueqing Li, Mahmut Taylan Kandemir, Jack Sampson, Vijaykrishnan Narayanan, Jinyang Li, Tongda Wu, Zhibo Wang, Yongpan Liu, Yuan Xie:
NEOFog: Nonvolatility-Exploiting Optimizations for Fog Computing. ASPLOS 2018: 782-796 - [c315]Shubham Rai, Srivatsa Rangachar Srinivasa, Patsy Cadareanu, Xunzhao Yin, Xiaobo Sharon Hu, Pierre-Emmanuel Gaillardon, Vijaykrishnan Narayanan, Akash Kumar:
Emerging reconfigurable nanotechnologies: can they support future electronics? ICCAD 2018: 13 - [c314]Jinhang Choi, Jack Sampson, Vijaykrishnan Narayanan:
Heuristic Approximation of Early-Stage CNN Data Representation for Vision Intelligence Systems. ICCD 2018: 218-225 - [c313]Peter A. Zientara, Jinhang Choi, Jack Sampson, Vijaykrishnan Narayanan:
Drones as collaborative sensors for image recognition. ICCE 2018: 1-4 - [c312]Jinhang Choi, Kevin M. Irick, Justin Hardin, Weichao Qiu, Alan L. Yuille, Jack Sampson, Vijaykrishnan Narayanan:
Stochastic Functional Verification of DNN Design through Progressive Virtual Dataset Generation. ISCAS 2018: 1-5 - [c311]Sandeep Krishna Thirumala, Arnab Raha, Hrishikesh Jayakumar, Kaisheng Ma, Narayanan Vijaykrishnan, Vijay Raghunathan, Sumeet Kumar Gupta:
Dual Mode Ferroelectric Transistor based Non-Volatile Flip-Flops for Intermittently-Powered Systems. ISLPED 2018: 31:1-31:6 - [c310]Srivatsa Rangachar Srinivasa, Akshay Krishna Ramanathan, Xueqing Li, Wei-Hao Chen, Fu-Kuo Hsueh, Chih-Chao Yang, Chang-Hong Shen, Jia-Min Shieh, Sumeet Kumar Gupta, Meng-Fan Marvin Chang, Swaroop Ghosh, Jack Sampson, Vijaykrishnan Narayanan:
A Monolithic-3D SRAM Design with Enhanced Robustness and In-Memory Computation Support. ISLPED 2018: 34:1-34:6 - [c309]Jinhang Choi, Srivatsa Rangachar Srinivasa, Yasuki Tanabe, Jack Sampson, Vijaykrishnan Narayanan:
A Power-Efficient Hybrid Architecture Design for Image Recognition Using CNNs. ISVLSI 2018: 22-27 - [c308]Nicholas Jao, Akshay Krishna Ramanathan, Srivatsa Rangachar Srinivasa, Sumitha George, John Sampson, Vijaykrishnan Narayanan:
Harnessing Emerging Technology for Compute-in-Memory Support. ISVLSI 2018: 447-452 - [c307]Sumitha George, Minli Julie Liao, Huaipan Jiang, Jagadish B. Kotra, Mahmut T. Kandemir, Jack Sampson, Vijaykrishnan Narayanan:
MDACache: Caching for Multi-Dimensional-Access Memories. MICRO 2018: 841-854 - [c306]Jake Eden, Thomas Kawchak, Vijaykrishnan Narayanan:
Indoor Navigation using Text Extraction. SiPS 2018: 112-117 - [c305]Peter A. Zientara, Jack Sampson, Vijaykrishnan Narayanan:
Noise Aware Power Adaptive Partitioned Deep Networks for Mobile Visual Assist Platforms. SoCC 2018: 186-191 - 2017
- [j106]Siddharth Advani, Peter A. Zientara, Nikhil Shukla, Ikenna Okafor, Kevin M. Irick, Jack Sampson, Suman Datta, Vijaykrishnan Narayanan:
A Multitask Grocery Assist System for the Visually Impaired: Smart glasses, gloves, and shopping carts provide auditory and tactile feedback. IEEE Consumer Electron. Mag. 6(1): 73-81 (2017) - [j105]Peter A. Zientara, Sooyeon Lee, Gus Henry Smith, Rorry Brenner, Laurent Itti, Mary Beth Rosson, John M. Carroll, Kevin M. Irick, Vijaykrishnan Narayanan:
Third Eye: A Shopping Assistant for the Visually Impaired. Computer 50(2): 16-24 (2017) - [j104]Wei-Yu Tsai, Davis R. Barch, Andrew S. Cassidy, Michael V. DeBole, Alexander Andreopoulos, Bryan L. Jackson, Myron D. Flickner, John V. Arthur, Dharmendra S. Modha, John Sampson, Vijaykrishnan Narayanan:
Always-On Speech Recognition Using TrueNorth, a Reconfigurable, Neurosynaptic Processor. IEEE Trans. Computers 66(6): 996-1007 (2017) - [j103]Vijaykrishnan Narayanan:
Editorial. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(12): 1933 (2017) - [j102]Yinan Sun, Zhe Yuan, Yongpan Liu, Xueqing Li, Yu Wang, Qi Wei, Yiqun Wang, Vijaykrishnan Narayanan, Huazhong Yang:
Maximum Energy Efficiency Tracking Circuits for Converter-Less Energy Harvesting Sensor Nodes. IEEE Trans. Circuits Syst. II Express Briefs 64-II(6): 670-674 (2017) - [j101]Xueqing Li, Sumitha George, Kaisheng Ma, Wei-Yu Tsai, Ahmedullah Aziz, John Sampson, Sumeet Kumar Gupta, Meng-Fan Chang, Yongpan Liu, Suman Datta, Vijaykrishnan Narayanan:
Advancing Nonvolatile Computing With Nonvolatile NCFET Latches and Flip-Flops. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(11): 2907-2919 (2017) - [j100]Kaisheng Ma, Xueqing Li, Huichu Liu, Xiao Sheng, Yiqun Wang, Karthik Swaminathan, Yongpan Liu, Yuan Xie, John Sampson, Vijaykrishnan Narayanan:
Dynamic Power and Energy Management for Energy Harvesting Nonvolatile Processor Systems. ACM Trans. Embed. Comput. Syst. 16(4): 107:1-107:23 (2017) - [j99]Yun-Jui Li, Ching-Yi Huang, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang, Suman Datta, Vijaykrishnan Narayanan:
Dynamic Diagnosis for Defective Reconfigurable Single-Electron Transistor Arrays. IEEE Trans. Very Large Scale Integr. Syst. 25(4): 1477-1489 (2017) - [c304]Kaisheng Ma, Xueqing Li, Srivatsa Rangachar Srinivasa, Yongpan Liu, John Sampson, Yuan Xie, Vijaykrishnan Narayanan:
Spendthrift: Machine learning based resource and frequency scaling for ambient energy harvesting nonvolatile processors. ASP-DAC 2017: 678-683 - [c303]John M. Carroll, Michelle McManus, Sooyeon Lee, Peter A. Zientara, Vijaykrishnan Narayanan:
The Third Eye: A Shopping Assistant for the Visually Impaired. CHI Extended Abstracts 2017: 465 - [c302]Wei-Yu Tsai, Jinhang Choi, Tulika Parija, Priyanka Gomatam, Chita R. Das, John Sampson, Vijaykrishnan Narayanan:
Co-training of Feature Extraction and Classification using Partitioned Convolutional Neural Networks. DAC 2017: 58:1-58:6 - [c301]Fang Su, Kaisheng Ma, Xueqing Li, Tongda Wu, Yongpan Liu, Vijaykrishnan Narayanan:
Nonvolatile processors: Why is it trending? DATE 2017: 966-971 - [c300]Sumeet Kumar Gupta, Danni Wang, Sumitha George, Ahmedullah Aziz, Xueqing Li, Suman Datta, Vijaykrishnan Narayanan:
Harnessing ferroelectrics for non-volatile memories and logic. ISQED 2017: 29-34 - [c299]Srivatsa Rangachar Srinivasa, Karthik Mohan, Wei-Hao Chen, Kuo-Hsinag Hsu, Xueqing Li, Meng-Fan Chang, Sumeet Kumar Gupta, John Sampson, Vijaykrishnan Narayanan:
Improving FPGA Design with Monolithic 3D Integration Using High Dense Inter-Stack Via. ISVLSI 2017: 128-133 - [c298]Kaisheng Ma, Xueqing Li, Jinyang Li, Yongpan Liu, Yuan Xie, Jack Sampson, Mahmut Taylan Kandemir, Vijaykrishnan Narayanan:
Incidental computing on IoT nonvolatile processors. MICRO 2017: 204-218 - 2016
- [j98]Moon Seok Kim, William Cane-Wissing, Xueqing Li, Jack Sampson, Suman Datta, Sumeet Kumar Gupta, Vijaykrishnan Narayanan:
Comparative Area and Parasitics Analysis in FinFET and Heterojunction Vertical TFET Standard Cells. ACM J. Emerg. Technol. Comput. Syst. 12(4): 38:1-38:23 (2016) - [j97]Kaisheng Ma, Xueqing Li, Karthik Swaminathan, Yang Zheng, Shuangchen Li, Yongpan Liu, Yuan Xie, John (Jack) Morgan Sampson, Vijaykrishnan Narayanan:
Nonvolatile Processor Architectures: Efficient, Reliable Progress with Unstable Power. IEEE Micro 36(3): 72-83 (2016) - [j96]John P. Sustersic, Brad Wyble, Siddharth Advani, Vijaykrishnan Narayanan:
Towards a unified multiresolution vision model for autonomous ground robots. Robotics Auton. Syst. 75: 221-232 (2016) - [j95]Vijaykrishnan Narayanan, Charles J. Alpert, Sara Dailey:
Editorial. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(3): 345 (2016) - [j94]Wei-Yu Tsai, Xueqing Li, Matthew Jerry, Baihua Xie, Nikhil Shukla, Huichu Liu, Nandhini Chandramoorthy, Matthew Cotter, Arijit Raychowdhury, Donald M. Chiarulli, Steven P. Levitan, Suman Datta, John Sampson, Nagarajan Ranganathan, Vijaykrishnan Narayanan:
Enabling New Computation Paradigms with HyperFET - An Emerging Device. IEEE Trans. Multi Scale Comput. Syst. 2(1): 30-48 (2016) - [j93]Ching-Hsuan Ho, Yung-Chih Chen, Chun-Yao Wang, Ching-Yi Huang, Suman Datta, Vijaykrishnan Narayanan:
Area-Aware Decomposition for Single-Electron Transistor Arrays. ACM Trans. Design Autom. Electr. Syst. 21(4): 70:1-70:20 (2016) - [j92]Moon Seok Kim, Xueqing Li, Huichu Liu, John Sampson, Suman Datta, Vijaykrishnan Narayanan:
Exploration of Low-Power High-SFDR Current-Steering D/A Converter Design Using Steep-Slope Heterojunction Tunnel FETs. IEEE Trans. Very Large Scale Integr. Syst. 24(6): 2299-2309 (2016) - [j91]Ching-Yi Huang, Yun-Jui Li, Chian-Wei Liu, Chun-Yao Wang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan:
Diagnosis and Synthesis for Defective Reconfigurable Single-Electron Transistor Arrays. IEEE Trans. Very Large Scale Integr. Syst. 24(6): 2321-2334 (2016) - [j90]Yang Xiao, Siddharth Advani, Donghwa Shin, Naehyuck Chang, Jack Sampson, Vijaykrishnan Narayanan:
A Saliency-Driven LCD Power Management System. IEEE Trans. Very Large Scale Integr. Syst. 24(8): 2689-2702 (2016) - [c297]Sumitha George, Kaisheng Ma, Ahmedullah Aziz, Xueqing Li, Asif Islam Khan, Sayeef S. Salahuddin, Meng-Fan Chang, Suman Datta, John Sampson, Sumeet Kumar Gupta, Vijaykrishnan Narayanan:
Nonvolatile memory design based on ferroelectric FETs. DAC 2016: 118:1-118:6 - [c296]Wei-Yu Tsai, Davis R. Barch, Andrew S. Cassidy, Michael V. DeBole, Alexander Andreopoulos, Bryan L. Jackson, Myron D. Flickner, Dharmendra S. Modha, Jack Sampson, Vijaykrishnan Narayanan:
LATTE: Low-power Audio Transform with TrueNorth Ecosystem. IJCNN 2016: 4270-4277 - [c295]Danni Wang, Sumitha George, Ahmedullah Aziz, Suman Datta, Vijaykrishnan Narayanan, Sumeet Kumar Gupta:
Ferroelectric Transistor based Non-Volatile Flip-Flop. ISLPED 2016: 10-15 - [c294]Sumitha George, Ahmedullah Aziz, Xueqing Li, Moon Seok Kim, Suman Datta, John Sampson, Sumeet Kumar Gupta, Vijaykrishnan Narayanan:
Device Circuit Co Design of FEFET Based Logic for Low Voltage Processors. ISVLSI 2016: 649-654 - [c293]Xueqing Li, Kaisheng Ma, Sumitha George, John Sampson, Vijaykrishnan Narayanan:
Enabling Internet-of-Things: Opportunities brought by emerging devices, circuits, and architectures. VLSI-SoC 2016: 1-6 - [c292]Xueqing Li, Kaisheng Ma, Sumitha George, John Sampson, Vijaykrishnan Narayanan:
Enabling Internet-of-Things with Opportunities Brought by Emerging Devices, Circuits and Architectures. VLSI-SoC (Selected Papers) 2016: 1-23 - 2015
- [j89]Dan Hammerstrom, Vijaykrishnan Narayanan:
Introduction to Special Issue on Neuromorphic Computing. ACM J. Emerg. Technol. Comput. Syst. 11(4): 32:1-32:2 (2015) - [j88]Kaisheng Ma, Xueqing Li, Shuangchen Li, Yongpan Liu, John (Jack) Morgan Sampson, Yuan Xie, Vijaykrishnan Narayanan:
Nonvolatile Processor Architecture Exploration for Energy-Harvesting Applications. IEEE Micro 35(5): 32-40 (2015) - [j87]Vijaykrishnan Narayanan, Charles J. Alpert, Sara Dailey:
Editorial. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(1): 1 (2015) - [j86]Chian-Wei Liu, Chang-En Chiang, Ching-Yi Huang, Yung-Chih Chen, Chun-Yao Wang, Suman Datta, Vijaykrishnan Narayanan:
Synthesis for Width Minimization in the Single-Electron Transistor Array. IEEE Trans. Very Large Scale Integr. Syst. 23(12): 2862-2875 (2015) - [c291]Ching-Yi Huang, Chian-Wei Liu, Chun-Yao Wang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan:
A defect-aware approach for mapping reconfigurable Single-Electron Transistor arrays. ASP-DAC 2015: 118-123 - [c290]Kevin M. Irick, Peter A. Zientara, Jack Sampson, Vijaykrishnan Narayanan:
Cognitive cameras: Assistive vision systems. CASES 2015: 188 - [c289]Mi Sun Park, Omesh Tickoo, Vijaykrishnan Narayanan, Mary Jane Irwin, Ravi Iyer:
Platform-aware dynamic configuration support for efficient text processing on heterogeneous system. DATE 2015: 1503-1508 - [c288]Siddharth Advani, Brigid Smith, Yasuki Tanabe, Kevin M. Irick, Matthew Cotter, Jack Sampson, Vijaykrishnan Narayanan:
Visual co-occurrence network: using context for large-scale object recognition in retail. ESTIMedia 2015: 1-10 - [c287]Siddharth Advani, Yasuki Tanabe, Kevin M. Irick, Jack Sampson, Vijaykrishnan Narayanan:
A scalable architecture for multi-class visual object detection. FPL 2015: 1-8 - [c286]Nandhini Chandramoorthy, Giuseppe Tagliavini, Kevin M. Irick, Antonio Pullini, Siddharth Advani, Sulaiman Al Habsi, Matthew Cotter, John Sampson, Vijaykrishnan Narayanan, Luca Benini:
Exploring architectural heterogeneity in intelligent vision systems. HPCA 2015: 1-12 - [c285]Kaisheng Ma, Yang Zheng, Shuangchen Li, Karthik Swaminathan, Xueqing Li, Yongpan Liu, Jack Sampson, Yuan Xie, Vijaykrishnan Narayanan:
Architecture exploration for ambient energy harvesting nonvolatile processors. HPCA 2015: 526-537 - [c284]Kaisheng Ma, Xueqing Li, Yongpan Liu, John Sampson, Yuan Xie, Vijaykrishnan Narayanan:
Dynamic Machine Learning Based Matching of Nonvolatile Processor Microarchitecture to Harvested Energy Profile. ICCAD 2015: 670-675 - [c283]Siddharth Advani, Srinidhi Kestur, Vijaykrishnan Narayanan:
Intelligent Vision Systems: Exploring the State-of-the-Art and Opportunities for the Future. iNIS 2015: 77-82 - [c282]Fen Ge, Jia Zhan, Yuan Xie, Vijaykrishnan Narayanan:
Exploring memory controller configurations for many-core systems with 3D stacked DRAMs. ISQED 2015: 565-570 - [c281]Moon Seok Kim, William Cane-Wissing, Jack Sampson, Suman Datta, Vijaykrishnan Narayanan, Sumeet Kumar Gupta:
Comparing Energy, Area, Delay Tradeoffs in Going Vertical with CMOS and Asymmetric HTFETs. ISVLSI 2015: 303-308 - [c280]Ahmedullah Aziz, William Cane-Wissing, Moon Seok Kim, Suman Datta, Vijaykrishnan Narayanan, Sumeet Kumar Gupta:
Single-Ended and Differential MRAMs Based on Spin Hall Effect: A Layout-Aware Design Perspective. ISVLSI 2015: 333-338 - [c279]Kaisheng Ma, Nandhini Chandramoorthy, Xueqing Li, Sumeet Kumar Gupta, John Sampson, Yuan Xie, Vijaykrishnan Narayanan:
Using Multiple-Input NEMS for Parallel A/D Conversion and Image Processing. ISVLSI 2015: 339-344 - [c278]Karthik Swaminathan, Jagadish Kotra, Huichu Liu, Jack Sampson, Mahmut T. Kandemir, Vijaykrishnan Narayanan:
Thermal-Aware Application Scheduling on Device-Heterogeneous Embedded Architectures. VLSID 2015: 221-226 - [c277]Unsuk Heo, Xueqing Li, Huichu Liu, Sumeet Kumar Gupta, Suman Datta, Vijaykrishnan Narayanan:
A High-Efficiency Switched-Capacitance HTFET Charge Pump for Low-Input-Voltage Applications. VLSID 2015: 304-309 - 2014
- [j85]Huichu Liu, Xueqing Li, Ramesh Vaddi, Kaisheng Ma, Suman Datta, Vijaykrishnan Narayanan:
Tunnel FET RF Rectifier Design for Energy Harvesting Applications. IEEE J. Emerg. Sel. Topics Circuits Syst. 4(4): 400-411 (2014) - [j84]Suman Datta, Huichu Liu, Vijaykrishnan Narayanan:
Tunnel FET technology: A reliability perspective. Microelectron. Reliab. 54(5): 861-874 (2014) - [j83]Vijaykrishnan Narayanan:
Editorial. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(1): 1 (2014) - [j82]Jia Zhan, Nikolay Stoimenov, Jin Ouyang, Lothar Thiele, Vijaykrishnan Narayanan, Yuan Xie:
Optimizing the NoC Slack Through Voltage and Frequency Scaling in Hard Real-Time Embedded Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(11): 1632-1643 (2014) - [j81]Vijaykrishnan Narayanan, Jürgen Teich:
Introduction to the Special Issue on Domain-Specific Multicore Computing. ACM Trans. Embed. Comput. Syst. 13(4s): 129:1-129:2 (2014) - [j80]Yong Cheol Peter Cho, Nandhini Chandramoorthy, Kevin M. Irick, Vijaykrishnan Narayanan:
Accelerating Multiresolution Gabor Feature Extraction for Real Time Vision Applications. J. Signal Process. Syst. 76(2): 149-168 (2014) - [c276]Karthik Swaminathan, Huichu Liu, Xueqing Li, Moon Seok Kim, Jack Sampson, Vijaykrishnan Narayanan:
Steep Slope Devices: Enabling New Architectural Paradigms. DAC 2014: 114:1-114:6 - [c275]Chian-Wei Liu, Chang-En Chiang, Ching-Yi Huang, Chun-Yao Wang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan:
Width minimization in the Single-Electron Transistor array synthesis. DATE 2014: 1-4 - [c274]Vijaykrishnan Narayanan, Suman Datta, Gert Cauwenberghs, Donald M. Chiarulli, Steven P. Levitan, H.-S. Philip Wong:
Video analytics using beyond CMOS devices. DATE 2014: 1-5 - [c273]Karthik Swaminathan, Moon Seok Kim, Nandhini Chandramoorthy, Behnam Sedighi, Robert Perricone, Jack Sampson, Vijaykrishnan Narayanan:
Modeling steep slope devices: From circuits to architectures. DATE 2014: 1-6 - [c272]Chris S. Lee, Kevin M. Irick, John Sampson, Vijaykrishnan Narayanan:
Data driven adaptation for QoS aware embedded vision systems. GlobalSIP 2014: 69-72 - [c271]Yang Xiao, Kevin M. Irick, Jack Sampson, Vijaykrishnan Narayanan, Chuanjun Zhang:
A task-oriented vision system. ACM Great Lakes Symposium on VLSI 2014: 181-186 - [c270]Matthew Cotter, Siddharth Advani, Jack Sampson, Kevin M. Irick, Vijaykrishnan Narayanan:
A hardware accelerated multilevel visual classifier for embedded visual-assist systems. ICCAD 2014: 96-100 - [c269]Siddharth Advani, Nandhini Chandramoorthy, Karthik Swaminathan, Kevin M. Irick, Yong Cheol Peter Cho, Jack Sampson, Vijaykrishnan Narayanan:
Refresh Enabled Video Analytics (REVA): Implications on power and performance of DRAM supported embedded visual systems. ICCD 2014: 501-504 - [c268]Chris S. Lee, Kevin M. Irick, Jack Sampson, Chuanjun Zhang, Vijaykrishnan Narayanan:
Exploiting natural redundancy in visual information. ICCD 2014: 505-508 - [c267]Karthik Swaminathan, Huichu Liu, Jack Sampson, Vijaykrishnan Narayanan:
An examination of the architecture and system-level tradeoffs of employing steep slope devices in 3D CMPs. ISCA 2014: 241-252 - [c266]Huichu Liu, Mahsa Shoaran, Xueqing Li, Suman Datta, Alexandre Schmid, Vijaykrishnan Narayanan:
Tunnel FET-based ultra-low power, low-noise amplifier design for bio-signal acquisition. ISLPED 2014: 57-62 - [c265]Matthew J. Cotter, Yan Fang, Steven P. Levitan, Donald M. Chiarulli, Vijaykrishnan Narayanan:
Computational Architectures Based on Coupled Oscillators. ISVLSI 2014: 130-135 - [c264]Kaisheng Ma, Huichu Liu, Yang Xiao, Yang Zheng, Xueqing Li, Sumeet Kumar Gupta, Yuan Xie, Vijaykrishnan Narayanan:
Independently-Controlled-Gate FinFET 6T SRAM Cell Design for Leakage Current Reduction and Enhanced Read Access Speed. ISVLSI 2014: 296-301 - [c263]Xueqing Li, Wei-Yu Tsai, Huichu Liu, Suman Datta, Vijaykrishnan Narayanan:
A Low-Voltage Low-Power LC Oscillator Using the Diode-Connected SymFET. ISVLSI 2014: 302-307 - [c262]Xueqing Li, Unsuk Dennis Heo, Kaisheng Ma, Vijaykrishnan Narayanan, Huichu Liu, Suman Datta:
Rf-powered systems using steep-slope devices. NEWCAS 2014: 73-76 - [c261]Wei-Yu Tsai, Huichu Liu, Xueqing Li, Vijaykrishnan Narayanan:
Low-power high-speed current mode logic using Tunnel-FETs. VLSI-SoC 2014: 1-6 - 2013
- [j79]Ravindhiran Mukundrajan, Matthew Cotter, Sungmin Bae, Vinay Saripalli, Mary Jane Irwin, Suman Datta, Vijaykrishnan Narayanan:
Design of energy-efficient circuits and systems using tunnel field effect transistors. IET Circuits Devices Syst. 7(5): 294-303 (2013) - [j78]Yung-Chih Chen, Soumya Eachempati, Chun-Yao Wang, Suman Datta, Yuan Xie, Vijaykrishnan Narayanan:
A Synthesis Algorithm for Reconfigurable Single-Electron Transistor Arrays. ACM J. Emerg. Technol. Comput. Syst. 9(1): 5:1-5:20 (2013) - [j77]Karthik Swaminathan, Emre Kultursay, Vinay Saripalli, Vijaykrishnan Narayanan, Mahmut T. Kandemir, Suman Datta:
Steep-Slope Devices: From Dark to Dim Silicon. IEEE Micro 33(5): 50-59 (2013) - [j76]Jawar Singh, Narayanan Vijaykrishnan:
A highly reliable NBTI Resilient 6T SRAM cell. Microelectron. Reliab. 53(4): 565-572 (2013) - [j75]Ahmed Al-Maashri, Matthew Cotter, Nandhini Chandramoorthy, Michael DeBole, Chi-Li Yu, Vijaykrishnan Narayanan, Chaitali Chakrabarti:
Hardware Acceleration for Neuromorphic Vision Algorithms. J. Signal Process. Syst. 70(2): 163-175 (2013) - [c260]Yuan-Ying Chang, Yoshi Shih-Chieh Huang, Vijaykrishnan Narayanan, Chung-Ta King:
ShieldUS: A novel design of dynamic shielding for eliminating 3D TSV crosstalk coupling noise. ASP-DAC 2013: 675-680 - [c259]Jörg Henkel, Vijaykrishnan Narayanan, Sri Parameswaran, Jürgen Teich:
Run-time adaption for highly-complex multi-core systems. CODES+ISSS 2013: 13:1-13:8 - [c258]Jia Zhan, Nikolay Stoimenov, Jin Ouyang, Lothar Thiele, Vijaykrishnan Narayanan, Yuan Xie:
Designing energy-efficient NoC for real-time embedded systems through slack optimization. DAC 2013: 37:1-37:6 - [c257]Yang Xiao, Kevin M. Irick, Vijaykrishnan Narayanan, Donghwa Shin, Naehyuck Chang:
Saliency aware display power management. DATE 2013: 1203-1208 - [c256]Chang-En Chiang, Li-Fu Tang, Chun-Yao Wang, Ching-Yi Huang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan:
On reconfigurable single-electron transistor arrays synthesis using reordering techniques. DATE 2013: 1807-1812 - [c255]Nandhini Chandramoorthy, Siddharth Advani, Kevin M. Irick, Vijaykrishnan Narayanan:
A Configurable Architecture for a Visual Saliency System and Its Application in Retail. FCCM 2013: 233 - [c254]Yuan-Ying Chang, Yoshi Shih-Chieh Huang, Matthew Poremba, Vijaykrishnan Narayanan, Yuan Xie, Chung-Ta King:
TS-Router: On maximizing the Quality-of-Allocation in the On-Chip Network. HPCA 2013: 390-399 - [c253]Siddharth Advani, John P. Sustersic, Kevin M. Irick, Vijaykrishnan Narayanan:
A multi-resolution saliency framework to drive foveation. ICASSP 2013: 2596-2600 - [c252]Yang Xiao, Chuanjun Zhang, Kevin Inck, Vijaykrishnan Narayanan:
Dynamic bandwidth adaptation using recognition accuracy prediction through pre-classification for embedded vision systems. ICCD 2013: 20-25 - [c251]Huichu Liu, Suman Datta, Vijaykrishnan Narayanan:
Steep switching tunnel FET: A promise to extend the energy efficient roadmap for post-CMOS digital and analog/RF applications. ISLPED 2013: 145-150 - [c250]Huichu Liu, Ramesh Vaddi, Suman Datta, Vijaykrishnan Narayanan:
Tunnel FET-based ultra-low power, high-sensitivity UHF RFID rectifier. ISLPED 2013: 157-162 - [c249]Chuanjun Zhang, Glenn G. Ko, Jungwook Choi, Shang-nien Tsai, Minje Kim, Abner Guzmán-Rivera, Rob A. Rutenbar, Paris Smaragdis, Mi Sun Park, Vijaykrishnan Narayanan, Hongyi Xin, Onur Mutlu, Bin Li, Li Zhao, Mei Chen:
EMERALD: Characterization of emerging applications and algorithms for low-power devices. ISPASS 2013: 122-123 - [c248]Matthew Cotter, Huichu Liu, Suman Datta, Vijaykrishnan Narayanan:
Evaluation of tunnel FET-based flip-flop designs for low power, high performance applications. ISQED 2013: 430-437 - [c247]Sungho Park, Ahmed Al-Maashri, Yang Xiao, Kevin M. Irick, Vijaykrishnan Narayanan:
Saliency-driven dynamic configuration of HMAX for energy-efficient multi-object recognition. ISVLSI 2013: 139-144 - [c246]Melvin Eze, Ozcan Ozturk, Vijaykrishnan Narayanan:
Staggered latch bus: A reliable offset switched architecture for long on-chip interconnect. VLSI-SoC 2013: 296-301 - [c245]Vijaykrishnan Narayanan:
Keynote talk: Embedded vision systems. VLSI Design 2013 - 2012
- [j74]Sungho Park, Ahmed Al-Maashri, Kevin M. Irick, Aarti Chandrashekhar, Matthew Cotter, Nandhini Chandramoorthy, Michael DeBole, Vijaykrishnan Narayanan:
System-On-Chip for Biologically Inspired Vision Applications. Inf. Media Technol. 7(4): 1294-1318 (2012) - [j73]Sungho Park, Ahmed Al-Maashri, Kevin M. Irick, Aarti Chandrashekhar, Matthew Cotter, Nandhini Chandramoorthy, Michael DeBole, Vijaykrishnan Narayanan:
System-On-Chip for Biologically Inspired Vision Applications. IPSJ Trans. Syst. LSI Des. Methodol. 5: 71-95 (2012) - [j72]Shengqi Yang, Pallav Gupta, Marilyn Wolf, Dimitrios N. Serpanos, Vijaykrishnan Narayanan, Yuan Xie:
Power Analysis Attack Resistance Engineering by Dynamic Voltage and Frequency Scaling. ACM Trans. Embed. Comput. Syst. 11(3): 62:1-62:16 (2012) - [j71]Padmaraj Singh, Vijaykrishnan Narayanan, David L. Landis:
Targeted random test generation for power-aware multicore designs. ACM Trans. Design Autom. Electr. Syst. 17(3): 25:1-25:19 (2012) - [c244]Sungho Park, Yong Cheol Peter Cho, Kevin M. Irick, Vijaykrishnan Narayanan:
A reconfigurable platform for the design and verification of domain-specific accelerators. ASP-DAC 2012: 108-113 - [c243]Karthik Swaminathan, Raghav Pisolkar, Cong Xu, Vijaykrishnan Narayanan:
When to forget: A system-level perspective on STT-RAMs. ASP-DAC 2012: 311-316 - [c242]Jagdish Sabarad, Srinidhi Kestur, Mi Sun Park, Dharav Dantara, Vijaykrishnan Narayanan, Yang Chen, Deepak Khosla:
A reconfigurable accelerator for neuromorphic object recognition. ASP-DAC 2012: 813-818 - [c241]Emre Kultursay, Karthik Swaminathan, Vinay Saripalli, Vijaykrishnan Narayanan, Mahmut T. Kandemir, Suman Datta:
Performance enhancement under power constraints using heterogeneous CMOS-TFET multicores. CODES+ISSS 2012: 245-254 - [c240]Adwait Jog, Asit K. Mishra, Cong Xu, Yuan Xie, Vijaykrishnan Narayanan, Ravishankar R. Iyer, Chita R. Das:
Cache revive: architecting volatile STT-RAM caches for enhanced performance in CMPs. DAC 2012: 243-252 - [c239]Ahmed Al-Maashri, Michael DeBole, Matthew Cotter, Nandhini Chandramoorthy, Yang Xiao, Vijaykrishnan Narayanan, Chaitali Chakrabarti:
Accelerating neuromorphic vision algorithms for recognition. DAC 2012: 579-584 - [c238]Padmaraj Singh, Vijaykrishnan Narayanan, David L. Landis:
Hazard driven test generation for SMT processors. DATE 2012: 256-259 - [c237]Mi Sun Park, Srinidhi Kestur, Jagdish Sabarad, Vijaykrishnan Narayanan, Mary Jane Irwin:
An FPGA-based accelerator for cortical object classification. DATE 2012: 691-696 - [c236]Srinidhi Kestur, Mi Sun Park, Jagdish Sabarad, Dharav Dantara, Vijaykrishnan Narayanan, Yang Chen, Deepak Khosla:
Emulating Mammalian Vision on Reconfigurable Hardware. FCCM 2012: 141-148 - [c235]Jing Xie, Vijaykrishnan Narayanan, Yuan Xie:
Mitigating electromigration of power supply networks using bidirectional current stress. ACM Great Lakes Symposium on VLSI 2012: 299-302 - [c234]Karthik Swaminathan, Emre Kultursay, Vinay Saripalli, Vijaykrishnan Narayanan, Mahmut T. Kandemir:
Design space exploration of workload-specific last-level caches. ISLPED 2012: 243-248 - [c233]Ravindhiran Mukundrajan, Matthew Cotter, Vinay Saripalli, Mary Jane Irwin, Suman Datta, Vijaykrishnan Narayanan:
Ultra Low Power Circuit Design Using Tunnel FETs. ISVLSI 2012: 153-158 - [c232]Yong Cheol Peter Cho, Nandhini Chandramoorthy, Kevin M. Irick, Vijaykrishnan Narayanan:
Multiresolution Gabor Feature Extraction for Real Time Applications. SiPS 2012: 55-60 - 2011
- [j70]Vinay Saripalli, Guangyu Sun, Asit K. Mishra, Yuan Xie, Suman Datta, Vijaykrishnan Narayanan:
Exploiting Heterogeneity for Energy Efficiency in Chip Multiprocessors. IEEE J. Emerg. Sel. Topics Circuits Syst. 1(2): 109-119 (2011) - [j69]Enrico Macii, Vijaykrishnan Narayanan, Kaushik Roy:
Guest Editorial Advances in Design of Energy-Efficient Circuits and Systems (Second Issue). IEEE J. Emerg. Sel. Topics Circuits Syst. 1(3): 205-207 (2011) - [j68]Asit K. Mishra, Aditya Yanamandra, Reetuparna Das, Soumya Eachempati, Ravi R. Iyer, Narayanan Vijaykrishnan, Chita R. Das:
RAFT: A router architecture with frequency tuning for on-chip networks. J. Parallel Distributed Comput. 71(5): 625-640 (2011) - [j67]Feng Wang, Yibo Chen, Chrysostomos Nicopoulos, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan:
Variation-Aware Task and Communication Mapping for MPSoC Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(2): 295-307 (2011) - [j66]Chi-Li Yu, Kevin M. Irick, Chaitali Chakrabarti, Vijaykrishnan Narayanan:
Multidimensional DFT IP Generator for FPGA Platforms. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(4): 755-764 (2011) - [j65]Chi-Li Yu, Jungsub Kim, Lanping Deng, Srinidhi Kestur, Vijaykrishnan Narayanan, Chaitali Chakrabarti:
FPGA Architecture for 2D Discrete Fourier Transform Based on 2D Decomposition for Large-sized Data. J. Signal Process. Syst. 64(1): 109-122 (2011) - [c231]Michael DeBole, Yang Xiao, Chi-Li Yu, Ahmed Al-Maashri, Matthew Cotter, Chaitali Chakrabarti, Vijaykrishnan Narayanan:
FPGA-accelerator system for computing biologically inspired feature extraction models. ACSCC 2011: 751-755 - [c230]Sungho Park, Srinidhi Kestur, Kevin M. Irick, Vijaykrishnan Narayanan:
Invited paper: Accelerating neuromorphic vision on FPGAs. CVPR Workshops 2011: 103-108 - [c229]Srinidhi Kestur, Kevin M. Irick, Sungho Park, Ahmed Al-Maashri, Vijaykrishnan Narayanan, Chaitali Chakrabarti:
An algorithm-architecture co-design framework for gridding reconstruction using FPGAs. DAC 2011: 585-590 - [c228]Vinay Saripalli, Asit K. Mishra, Suman Datta, Vijaykrishnan Narayanan:
An energy-efficient heterogeneous CMP based on hybrid TFET-CMOS cores. DAC 2011: 729-734 - [c227]Yung-Chih Chen, Soumya Eachempati, Chun-Yao Wang, Suman Datta, Yuan Xie, Vijaykrishnan Narayanan:
Automated mapping for reconfigurable single-electron transistor arrays. DAC 2011: 878-883 - [c226]Srinidhi Kestur, Dharav Dantara, Vijaykrishnan Narayanan:
SHARC: A streaming model for FPGA accelerators and its application to Saliency. DATE 2011: 1237-1242 - [c225]Sungmin Bae, Yong Cheol Peter Cho, Sungho Park, Kevin M. Irick, Yongseok Jin, Vijaykrishnan Narayanan:
An FPGA Implementation of Information Theoretic Visual-Saliency System and Its Optimization. FCCM 2011: 41-48 - [c224]Srinidhi Kestur, Dharav Dantara, Vijaykrishnan Narayanan:
A streaming FPGA implementation of a steerable filter for real-time applications (abstract only). FPGA 2011: 281 - [c223]Yong Cheol Peter Cho, Sungmin Bae, Yongseok Jin, Kevin M. Irick, Vijaykrishnan Narayanan:
Exploring Gabor Filter Implementations for Visual Cortex Modeling on FPGA. FPL 2011: 311-316 - [c222]Vijaykrishnan Narayanan, Vinay Saripalli, Karthik Swaminathan, Ravindhiran Mukundrajan, Guangyu Sun, Yuan Xie, Suman Datta:
Enabling architectural innovations using non-volatile memory. ACM Great Lakes Symposium on VLSI 2011: 439-444 - [c221]Michael DeBole, Ahmed Al-Maashri, Matthew Cotter, Chi-Li Yu, Chaitali Chakrabarti, Vijaykrishnan Narayanan:
A framework for accelerating neuromorphic-vision algorithms on FPGAs. ICCAD 2011: 810-813 - [c220]Asit K. Mishra, Xiangyu Dong, Guangyu Sun, Yuan Xie, Narayanan Vijaykrishnan, Chita R. Das:
Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs. ISCA 2011: 69-80 - [c219]Asit K. Mishra, Narayanan Vijaykrishnan, Chita R. Das:
A case for heterogeneous on-chip interconnects for CMPs. ISCA 2011: 389-400 - [c218]Karthik Swaminathan, Emre Kultursay, Vinay Saripalli, Vijaykrishnan Narayanan, Mahmut T. Kandemir, Suman Datta:
Improving energy efficiency of multi-threaded applications using heterogeneous CMOS-TFET multicores. ISLPED 2011: 247-252 - [c217]Han-Wei Chen, Suresh Srinivasan, Yuan Xie, Vijaykrishnan Narayanan:
Impact of Circuit Degradation on FPGA Design Security. ISVLSI 2011: 230-235 - [c216]Karthik Swaminathan, Ravindhiran Mukundrajan, Niranjan Soundararajan, Vijaykrishnan Narayanan:
Towards Resilient Micro-architectures: Datapath Reliability Enhancement Using STT-MRAM. ISVLSI 2011: 236-241 - [c215]Vinay Saripalli, Suman Datta, Vijaykrishnan Narayanan, Jaydeep P. Kulkarni:
Variation-tolerant ultra low-power heterojunction tunnel FET SRAM design. NANOARCH 2011: 45-52 - [c214]Ahmed Al-Maashri, Michael DeBole, Chi-Li Yu, Vijaykrishnan Narayanan, Chaitali Chakrabarti:
A hardware architecture for accelerating neuromorphic vision algorithms. SiPS 2011: 355-360 - [p2]Ahmed Al-Maashri, Guangyu Sun, Xiangyu Dong, Yuan Xie, Narayanan Vijaykrishnan:
Influence of Stacked 3D Memory/Cache Architectures on GPUs. 3D Integration for NoC-based SoC Architectures 2011: 249-271 - 2010
- [b1]Chrysostomos Nicopoulos, Vijaykrishnan Narayanan, Chita R. Das:
Network-on-Chip Architectures - A Holistic Design Exploration. Lecture Notes in Electrical Engineering 45, Springer 2010, ISBN 978-90-481-3030-6, pp. 1-209 [contents] - [j64]Vinay Saripalli, Lu Liu, Suman Datta, Vijaykrishnan Narayanan:
Energy-Delay Performance of Nanoscale Transistors Exhibiting Single Electron Behavior and Associated Logic Circuits. J. Low Power Electron. 6(3): 415-428 (2010) - [j63]Chrysostomos Nicopoulos, Suresh Srinivasan, Aditya Yanamandra, Dongkook Park, Vijaykrishnan Narayanan, Chita R. Das, Mary Jane Irwin:
On the Effects of Process Variation in Network-on-Chip Architectures. IEEE Trans. Dependable Secur. Comput. 7(3): 240-254 (2010) - [j62]Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Total Power Optimization for Combinational Logic Using Genetic Algorithms. J. Signal Process. Syst. 58(2): 145-160 (2010) - [c213]Jawar Singh, Krishnan Ramakrishnan, Saurabh Mookerjea, Suman Datta, Narayanan Vijaykrishnan, Dhiraj K. Pradhan:
A novel si-tunnel FET based SRAM design for ultra low-power 0.3V VDD applications. ASP-DAC 2010: 181-186 - [c212]Aditya Yanamandra, Soumya Eachempati, Niranjan Soundararajan, Vijaykrishnan Narayanan, Mary Jane Irwin, Ramakrishnan Krishnan:
Optimizing power and performance for reliable on-chip networks. ASP-DAC 2010: 431-436 - [c211]Aditi Rathi, Michael DeBole, Weina Ge, Robert T. Collins, Narayanan Vijaykrishnan:
A GPU based implementation of Center-Surround Distribution Distance for feature extraction and matching. DATE 2010: 172-177 - [c210]Andrew J. Ricketts, Jawar Singh, Krishnan Ramakrishnan, Narayanan Vijaykrishnan, Dhiraj K. Pradhan:
Investigating the impact of NBTI on different power saving cache strategies. DATE 2010: 592-597 - [c209]Vijaykrishnan Narayanan, Ahmed Al-Maashri, Kevin M. Irick, Michael DeBole, Sungho Park:
AutoFLEX: A Framework for Image Processing Applications on Multiple-FPGA Systems. ERSA 2010: 59-66 - [c208]Srinidhi Kestur, Sungho Park, Kevin M. Irick, Vijaykrishnan Narayanan:
Accelerating the Nonuniform Fast Fourier Transform Using FPGAs. FCCM 2010: 19-26 - [c207]Sungmin Bae, Narayanan Vijaykrishnan:
Thermal Gradient Aware Clock Skew Scheduling for FPGAs. FPL 2010: 101-106 - [c206]Chi-Li Yu, Chaitali Chakrabarti, Sungho Park, Vijaykrishnan Narayanan:
Bandwidth-intensive FPGA architecture for multi-dimensional DFT. ICASSP 2010: 1486-1489 - [c205]Vikram Sampath Kumar, Kevin M. Irick, Ahmed Al-Maashri, Narayanan Vijaykrishnan:
A Scalable Bandwidth Aware Architecture for Connected Component Labeling. ISVLSI 2010: 116-121 - [c204]Vikram Sampath Kumar, Kevin M. Irick, Ahmed Al-Maashri, Vijaykrishnan Narayanan:
A Scalable Bandwidth-Aware Architecture for Connected Component Labeling. ISVLSI (Selected papers) 2010: 133-149 - [c203]Vinay Saripalli, Vijaykrishnan Narayanan, Suman Datta:
Analyzing Energy-Delay Behavior in Room Temperature Single Electron Transistors. VLSI Design 2010: 399-404
2000 – 2009
- 2009
- [j61]Soumya Eachempati, Narayanan Vijaykrishnan, Arthur Nieuwoudt, Yehia Massoud:
Predicting the performance and reliability of future field programmable gate arrays routing architectures with carbon nanotube bundle interconnect. IET Circuits Devices Syst. 3(2): 64-75 (2009) - [j60]Richard R. Brooks, P. Y. Govindaraju, Matthew Pirretti, Narayanan Vijaykrishnan, Mahmut T. Kandemir:
Clone Detection in Sensor Networks with Ad Hoc and Grid Topologies. Int. J. Distributed Sens. Networks 5(3): 209-223 (2009) - [j59]Michael DeBole, Krishnan Ramakrishnan, Varsha Balakrishnan, Wenping Wang, Hong Luo, Yu Wang, Yuan Xie, Yu Cao, Narayanan Vijaykrishnan:
New-Age: A Negative Bias Temperature Instability-Estimation Framework for Microarchitectural Components. Int. J. Parallel Program. 37(4): 417-431 (2009) - [j58]Madhu Mutyam, Feng Wang, Krishnan Ramakrishnan, Vijaykrishnan Narayanan, Mahmut T. Kandemir, Yuan Xie, Mary Jane Irwin:
Process-Variation-Aware Adaptive Cache Architecture and Management. IEEE Trans. Computers 58(7): 865-877 (2009) - [j57]Jungsub Kim, Lanping Deng, Prasanth Mangalagiri, Kevin M. Irick, Kanwaldeep Sobti, Mahmut T. Kandemir, Vijaykrishnan Narayanan, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun:
An Automated Framework for Accelerating Numerical Algorithms on Reconfigurable Platforms Using Algorithmic/Architectural Optimization. IEEE Trans. Computers 58(12): 1654-1667 (2009) - [j56]Tamer Ragheb, Andrew J. Ricketts, Mosin Mondal, Sami Kirolos, Greg M. Link, Vijaykrishnan Narayanan, Yehia Massoud:
Design of Thermally Robust Clock Trees Using Dynamically Adaptive Clock Buffers. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(2): 374-383 (2009) - [j55]Rajaraman Ramanarayanan, Vijay Degalahal, Krishnan Ramakrishnan, Jungsub Kim, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin, Kenan Unlu:
Modeling Soft Errors at the Device and Logic Levels for Combinational Circuits. IEEE Trans. Dependable Secur. Comput. 6(3): 202-216 (2009) - [j54]Jie S. Hu, Feihui Li, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Compiler-assisted soft error detection under performance and energy constraints in embedded systems. ACM Trans. Embed. Comput. Syst. 8(4): 27:1-27:30 (2009) - [c202]Michael DeBole, Krishnan Ramakrishnan, Varsha Balakrishnan, Wenping Wang, Hong Luo, Yu Wang, Yuan Xie, Yu Cao, Narayanan Vijaykrishnan:
A framework for estimating NBTI degradation of microarchitectural components. ASP-DAC 2009: 455-460 - [c201]Srinath Sridharan, Michael DeBole, Guangyu Sun, Yuan Xie, Vijaykrishnan Narayanan:
A criticality-driven microarchitectural three dimensional (3D) floorplanner. ASP-DAC 2009: 763-768 - [c200]Sungmin Bae, Prasanth Mangalagiri, Narayanan Vijaykrishnan:
Exploiting clock skew scheduling for FPGA. DATE 2009: 1524-1529 - [c199]Aditya Yanamandra, Mary Jane Irwin, Vijaykrishnan Narayanan, Mahmut T. Kandemir, Sri Hari Krishna Narayanan:
In-Network Caching for Chip Multiprocessors. HiPEAC 2009: 373-388 - [c198]Reetuparna Das, Soumya Eachempati, Asit K. Mishra, Narayanan Vijaykrishnan, Chita R. Das:
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs. HPCA 2009: 175-186 - [c197]Suman Datta, Vijaykrishnan Narayanan:
Green transistors to green architectures. ISLPED 2009: 429-430 - [c196]Prasanth Mangalagiri, Vijaykrishnan Narayanan:
Lifetime Reliability Aware Design Flow Techniques for Dual-Vdd Based Platform FPGAs. ISVLSI 2009: 61-66 - [c195]Sungmin Bae, Krishnan Ramakrishnan, Narayanan Vijaykrishnan:
A Novel Low Area Overhead Body Bias FPGA Architecture for Low Power Applications. ISVLSI 2009: 193-198 - [c194]Asit K. Mishra, Reetuparna Das, Soumya Eachempati, Ravishankar R. Iyer, Narayanan Vijaykrishnan, Chita R. Das:
A case for dynamic frequency tuning in on-chip networks. MICRO 2009: 292-303 - [c193]Padmaraj Singh, David L. Landis, Vijaykrishnan Narayanan:
Test Generation for Precise Interrupts on Out-of-Order Microprocessors. MTV 2009: 79-82 - [c192]Yuan Xie, Soumya Eachempati, Aditya Yanamandra, Vijaykrishnan Narayanan, Mary Jane Irwin:
Power and area reduction using carbon nanotube bundle interconnect in global clock tree distribution network. NANOARCH 2009: 51-56 - [c191]Vinay Saripalli, Vijaykrishnan Narayanan, Suman Datta:
Ultra Low Energy Binary Decision Diagram Circuits Using Few Electron Transistors. NanoNet 2009: 200-209 - [c190]Jungsub Kim, Chi-Li Yu, Lanping Deng, Srinidhi Kestur, Vijaykrishnan Narayanan, Chaitali Chakrabarti:
FPGA architecture for 2D Discrete Fourier Transform based on 2D decomposition for large-sized data. SiPS 2009: 121-126 - [c189]Jörg Henkel, Vijaykrishnan Narayanan, Sri Parameswaran, Roshan G. Ragel:
Security and Dependability of Embedded Systems: A Computer Architects' Perspective. VLSI Design 2009: 30-32 - 2008
- [j53]Suresh Srinivasan, Lin Li, Martino Ruggiero, Federico Angiolini, Narayanan Vijaykrishnan, Luca Benini:
Exploring architectural solutions for energy optimisations in bus-based system-on-chip. IET Comput. Digit. Tech. 2(5): 347-354 (2008) - [j52]Vijaykrishnan Narayanan:
Editorial. ACM J. Emerg. Technol. Comput. Syst. 4(2): 4:1 (2008) - [j51]Suresh Srinivasan, Krishnan Ramakrishnan, Prasanth Mangalagiri, Yuan Xie, Vijaykrishnan Narayanan, Mary Jane Irwin, Karthik Sarpatwari:
Toward Increasing FPGA Lifetime. IEEE Trans. Dependable Secur. Comput. 5(2): 115-127 (2008) - [j50]Yuh-Fang Tsai, Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin:
Design Space Exploration for 3-D Cache. IEEE Trans. Very Large Scale Integr. Syst. 16(4): 444-455 (2008) - [j49]Shengqi Yang, Wenping Wang, Tiehan Lv, Wayne H. Wolf, Narayanan Vijaykrishnan, Yuan Xie:
Case Study of Reliability-Aware and Low-Power Design. IEEE Trans. Very Large Scale Integr. Syst. 16(7): 861-873 (2008) - [j48]Aman Gayasen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Arifur Rahman:
Designing a 3-D FPGA: Switch Box Architecture and Thermal Issues. IEEE Trans. Very Large Scale Integr. Syst. 16(7): 882-893 (2008) - [c188]David Atienza, Giovanni De Micheli, Luca Benini, José L. Ayala, Pablo García Del Valle, Michael DeBole, Vijaykrishnan Narayanan:
Reliability-aware design for nanometer-scale devices. ASP-DAC 2008: 549-554 - [c187]Niranjan Soundararajan, Aditya Yanamandra, Chrysostomos Nicopoulos, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin:
Analysis and solutions to issue queue process variation. DSN 2008: 11-21 - [c186]Kevin M. Irick, Michael DeBole, Vijaykrishnan Narayanan, Aman Gayasen:
A Hardware Efficient Support Vector Machine Architecture for FPGA. FCCM 2008: 304-305 - [c185]Prasanth Mangalagiri, Karthik Sarpatwari, Aditya Yanamandra, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin, Osama Awadel Karim:
A low-power phase change memory based hybrid cache architecture. ACM Great Lakes Symposium on VLSI 2008: 395-398 - [c184]Reetuparna Das, Asit K. Mishra, Chrysostomos Nicopoulos, Dongkook Park, Vijaykrishnan Narayanan, Ravishankar R. Iyer, Mazin S. Yousif, Chita R. Das:
Performance and power optimization through data compression in Network-on-Chip architectures. HPCA 2008: 215-225 - [c183]Prasanth Mangalagiri, Sungmin Bae, Krishnan Ramakrishnan, Yuan Xie, Vijaykrishnan Narayanan:
Thermal-aware reliability analysis for platform FPGAs. ICCAD 2008: 722-727 - [c182]Krishnan Ramakrishnan, Xiaoxia Wu, Narayanan Vijaykrishnan, Yuan Xie:
Comparative analysis of NBTI effects on low power and high performance flip-flops. ICCD 2008: 200-205 - [c181]Dongkook Park, Soumya Eachempati, Reetuparna Das, Asit K. Mishra, Yuan Xie, Narayanan Vijaykrishnan, Chita R. Das:
MIRA: A Multi-layered On-Chip Interconnect Router Architecture. ISCA 2008: 251-261 - [c180]Niranjan Soundararajan, Narayanan Vijaykrishnan, Anand Sivasubramaniam:
Impact of dynamic voltage and frequency scaling on the architectural vulnerability of GALS architectures. ISLPED 2008: 351-356 - [c179]Krishnan Ramakrishnan, R. Rajaraman, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin, Kenan Unlu:
Hierarchical Soft Error Estimation Tool (HSEET). ISQED 2008: 680-683 - [c178]Soumya Eachempati, Vinay Saripalli, Narayanan Vijaykrishnan, Suman Datta:
Reconfigurable BDD based quantum circuits. NANOARCH 2008: 61-67 - [c177]Lanping Deng, Chi-Li Yu, Chaitali Chakrabarti, Jungsub Kim, Vijaykrishnan Narayanan:
Efficient image reconstruction using partial 2D Fourier transform. SiPS 2008: 49-54 - [e4]Vijaykrishnan Narayanan, Zhiyuan Yan, Enrico Macii, Sanjukta Bhanja:
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, Orlando, Florida, USA, May 4-6, 2008. ACM 2008, ISBN 978-1-59593-999-9 [contents] - [e3]Vijaykrishnan Narayanan, C. P. Ravikumar, Jörg Henkel, Ali Keshavarzi, Vojin G. Oklobdzija, Barry M. Pangrle:
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008, Bangalore, India, August 11-13, 2008. ACM 2008, ISBN 978-1-60558-109-5 [contents] - 2007
- [j47]Jie S. Hu, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir:
Optimising power efficiency in trace cache fetch unit. IET Comput. Digit. Tech. 1(4): 334-348 (2007) - [j46]Feng Wang, Michael DeBole, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin:
On-chip bus thermal analysis and optimisation. IET Comput. Digit. Tech. 1(5): 590-599 (2007) - [j45]Aman Gayasen, Suresh Srinivasan, Narayanan Vijaykrishnan, Mahmut T. Kandemir:
Design of power-aware FPGA fabrics. Int. J. Embed. Syst. 3(1/2): 52-64 (2007) - [j44]Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Irwin:
Reducing non-deterministic loads in low-power caches via early cache set resolution. Microprocess. Microsystems 31(5): 293-301 (2007) - [j43]Tao Li, Lizy Kurian John, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Juan Rubio:
OS-Aware Branch Prediction: Improving Microprocessor Control Flow Prediction for Operating Systems. IEEE Trans. Computers 56(1): 2-17 (2007) - [j42]Richard R. Brooks, P. Y. Govindaraju, Matthew Pirretti, Narayanan Vijaykrishnan, Mahmut T. Kandemir:
On the Detection of Clones in Sensor Networks Using Random Key Predistribution. IEEE Trans. Syst. Man Cybern. Part C 37(6): 1246-1258 (2007) - [j41]Yuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Reliability-aware Co-synthesis for Embedded Systems. J. VLSI Signal Process. 49(1): 87-99 (2007) - [c176]Soumya Eachempati, Arthur Nieuwoudt, Aman Gayasen, Narayanan Vijaykrishnan, Yehia Massoud:
Assessing carbon nanotube bundle interconnect for future FPGA architectures. DATE 2007: 307-312 - [c175]Madhu Mutyam, Narayanan Vijaykrishnan:
Working with process variation aware caches. DATE 2007: 1152-1157 - [c174]Mosin Mondal, Andrew J. Ricketts, Sami Kirolos, Tamer Ragheb, Greg M. Link, Narayanan Vijaykrishnan, Yehia Massoud:
Thermally robust clocking schemes for 3D integrated circuits. DATE 2007: 1206-1211 - [c173]Jungsub Kim, Prasanth Mangalagiri, Kevin M. Irick, Mahmut T. Kandemir, Vijaykrishnan Narayanan, Kanwaldeep Sobti, Lanping Deng, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun:
TANOR: A Tool for Accelerating N-Body Simulations on Reconfigurable Platforms. FPL 2007: 68-73 - [c172]Kevin M. Irick, Michael DeBole, Vijaykrishnan Narayanan, Rajeev Sharma, Hankyu Moon, Satish Mummareddy:
A Unified Streaming Architecture for Real Time Face Detection and Gender Classification. FPL 2007: 267-272 - [c171]Dongkook Park, Reetuparna Das, Chrysostomos Nicopoulos, Jongman Kim, Narayanan Vijaykrishnan, Ravishankar R. Iyer, Chita R. Das:
Design of a Dynamic Priority-Based Fast Path Architecture for On-Chip Interconnects. Hot Interconnects 2007: 15-20 - [c170]Feng Wang, Chrysostomos Nicopoulos, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan:
Variation-aware task allocation and scheduling for MPSoC. ICCAD 2007: 598-603 - [c169]Suresh Srinivasan, Prasanth Mangalagiri, Yuan Xie, Narayanan Vijaykrishnan:
FPGA routing architecture analysis under variations. ICCD 2007: 152-157 - [c168]Jongman Kim, Chrysostomos Nicopoulos, Dongkook Park, Reetuparna Das, Yuan Xie, Narayanan Vijaykrishnan, Mazin S. Yousif, Chita R. Das:
A novel dimensionally-decomposed router for on-chip communication in 3D architectures. ISCA 2007: 138-149 - [c167]Mosin Mondal, Andrew J. Ricketts, Sami Kirolos, Tamer Ragheb, Greg M. Link, Narayanan Vijaykrishnan, Yehia Massoud:
Mitigating Thermal Effects on Clock Skew with Dynamically Adaptive Drivers. ISQED 2007: 67-72 - [c166]Amol Mupid, Madhu Mutyam, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
Variation Analysis of CAM Cells. ISQED 2007: 333-338 - [c165]Krishnan Ramakrishnan, R. Rajaraman, Sivaprakasam Suresh, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
Variation Impact on SER of Combinational Circuits. ISQED 2007: 911-916 - [c164]Andrew J. Ricketts, Madhu Mutyam, Narayanan Vijaykrishnan, Mary Jane Irwin:
Investigating Simple Low Latency Reliable Multiported Register Files. ISVLSI 2007: 375-382 - [c163]Soumya Eachempati, Narayanan Vijaykrishnan, Arthur Nieuwoudt, Yehia Massoud:
Impact of Process Variations on Carbon Nanotube Bundle Interconnect for Future FPGA Architectures. ISVLSI 2007: 516-517 - [c162]Kanwaldeep Sobti, Lanping Deng, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun, Jungsub Kim, Prasanth Mangalagiri, Kevin M. Irick, Mahmut T. Kandemir, Vijaykrishnan Narayanan:
Efficient Function Evaluations with Lookup Tables for Structured Matrix Operations. SiPS 2007: 463-468 - [c161]Balaji Vaidyanathan, Wei-Lun Hung, Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin:
Architecting Microprocessor Components in 3D Design Space. VLSI Design 2007: 103-108 - [c160]Krishnan Ramakrishnan, Sivaprakasam Suresh, Narayanan Vijaykrishnan, Mary Jane Irwin:
Impact of NBTI on FPGAs. VLSI Design 2007: 717-722 - [e2]Diana Marculescu, Anand Raghunathan, Ali Keshavarzi, Vijaykrishnan Narayanan:
Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007, Portland, OR, USA, August 27-29, 2007. ACM 2007, ISBN 978-1-59593-709-4 [contents] - [i3]Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Thermal-Aware Task Allocation and Scheduling for Embedded Systems. CoRR abs/0710.4660 (2007) - [i2]Yuh-Fang Tsai, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin:
Leakage-Aware Interconnect for On-Chip Network. CoRR abs/0710.4731 (2007) - [i1]Greg M. Link, Narayanan Vijaykrishnan:
Hotspot Prevention Through Runtime Reconfiguration in Network-On-Chip. CoRR abs/0710.4764 (2007) - 2006
- [j40]Narayanan Vijaykrishnan, Yuan Xie:
Reliability Concerns in Embedded System Designs. Computer 39(1): 118-120 (2006) - [j39]Matthew Pirretti, Sencun Zhu, Narayanan Vijaykrishnan, Patrick D. McDaniel, Mahmut T. Kandemir, Richard R. Brooks:
The Sleep Deprivation Attack in Sensor Networks: Analysis and Methods of Defense. Int. J. Distributed Sens. Networks 2(3): 267-287 (2006) - [j38]Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf:
An efficient architecture for motion estimation and compensation in the transform domain. IEEE Trans. Circuits Syst. Video Technol. 16(2): 191-201 (2006) - [j37]Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin:
Inverse discrete cosine transform architecture exploiting sparseness and symmetry properties. IEEE Trans. Circuits Syst. Video Technol. 16(5): 655-662 (2006) - [j36]Wei Zhang, Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Reducing dynamic and leakage energy in VLIW architectures. ACM Trans. Embed. Comput. Syst. 5(1): 1-28 (2006) - [j35]Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, Rajarathnam Chandramouli:
Block-based frequency scalable technique for efficient hierarchical coding. IEEE Trans. Signal Process. 54(7): 2559-2566 (2006) - [c159]Balaji Vaidyanathan, Suresh Srinivasan, Yuan Xie, Narayanan Vijaykrishnan, Rong Luo:
Leakage Optimized DECAP Design for FPGAs. APCCAS 2006: 960-963 - [c158]Guilin Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Object duplication for improving reliability. ASP-DAC 2006: 140-145 - [c157]Suresh Srinivasan, Prasanth Mangalagiri, Yuan Xie, Narayanan Vijaykrishnan, Karthik Sarpatwari:
FLAW: FPGA lifetime awareness. DAC 2006: 630-635 - [c156]Andrew J. Ricketts, Kevin M. Irick, Narayanan Vijaykrishnan, Mary Jane Irwin:
Priority scheduling in digital microfluidics-based biochips. DATE 2006: 329-334 - [c155]Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin:
On-chip bus thermal analysis and optimization. DATE 2006: 850-855 - [c154]Dongkook Park, Chrysostomos Nicopoulos, Jongman Kim, Narayanan Vijaykrishnan, Chita R. Das:
Exploring Fault-Tolerant Network-on-Chip Architectures. DSN 2006: 93-104 - [c153]Aman Gayasen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Arif Rahman:
Switch Box Architectures for Three-Dimensional FPGAs. FCCM 2006: 335-336 - [c152]Priya Sundararajan, Aman Gayasen, Narayanan Vijaykrishnan, Tim Tuan:
Thermal characterization and optimization in platform FPGAs. ICCAD 2006: 443-447 - [c151]Jongman Kim, Chrysostomos Nicopoulos, Dongkook Park, Vijaykrishnan Narayanan, Mazin S. Yousif, Chita R. Das:
A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks. ISCA 2006: 4-15 - [c150]Feihui Li, Chrysostomos Nicopoulos, Thomas D. Richardson, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir:
Design and Management of 3D Chip Multiprocessors Using Network-in-Memory. ISCA 2006: 130-141 - [c149]Wei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin:
Interconnect and Thermal-aware Floorplanning for 3D Microprocessors. ISQED 2006: 98-104 - [c148]Greg M. Link, Narayanan Vijaykrishnan:
Thermal Trends in Emerging Technologies. ISQED 2006: 625-632 - [c147]Ing-Chao Lin, Suresh Srinivasan, Narayanan Vijaykrishnan, Nagu R. Dhanwada:
Transaction Level Error Susceptibility Model for Bus Based SoC Architectures. ISQED 2006: 775-780 - [c146]Shengqi Yang, Wayne H. Wolf, Narayanan Vijaykrishnan, Yuan Xie:
Reliability-Aware SOC Voltage Islands Partition and Floorplan. ISVLSI 2006: 343-348 - [c145]Madhu Mutyam, Melvin Eze, Narayanan Vijaykrishnan, Yuan Xie:
Delay and Energy Efficient Data Transmission for On-Chip Buses. ISVLSI 2006: 355-360 - [c144]Suresh Srinivasan, Narayanan Vijaykrishnan:
Variation Aware Placement for FPGAs. ISVLSI 2006: 422-423 - [c143]Theo Theocharides, Narayanan Vijaykrishnan, Mary Jane Irwin:
A Parallel Architecture for Hardware Face Detection. ISVLSI 2006: 452-453 - [c142]Madhu Mutyam, Feihui Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Compiler-directed thermal management for VLIW functional units. LCTES 2006: 163-172 - [c141]Chrysostomos Nicopoulos, Dongkook Park, Jongman Kim, Narayanan Vijaykrishnan, Mazin S. Yousif, Chita R. Das:
ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers. MICRO 2006: 333-346 - [c140]Dongkook Park, Chrysostomos Nicopoulos, Jongman Kim, Narayanan Vijaykrishnan, Chita R. Das:
A Distributed Multi-Point Network Interface for Low-Latency, Deadlock-Free On-Chip Interconnects. Nano-Net 2006: 1-6 - [c139]Priya Sundararajan, Sridhar Krishnamurthy, Narayanan Vijaykrishnan, Kamal Chaudhary, Rajeev Jayaraman:
Performance Improvements through Timing Driven Reconfiguration of Black-Boxes in Platform FPGAs. SoCC 2006: 105-106 - [c138]G. Chen, Liping Xue, Jungsub Kim, Kanwaldeep Sobti, Lanping Deng, Xiaobai Sun, Nikos Pitsianis, Chaitali Chakrabarti, Mahmut T. Kandemir, Narayanan Vijaykrishnan:
Geometric Tiling for Reducing Power Consumption in Structured Matrix Operations. SoCC 2006: 113-114 - [c137]Suresh Srinivasan, Raghavan Ramadoss, Narayanan Vijaykrishnan:
Process Variation Aware Parallelization Strategies for MPSoCs. SoCC 2006: 179-182 - [c136]R. Rajaraman, Jungsub Kim, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
SEAT-LA: A Soft Error Analysis Tool for Combinational Logic. VLSI Design 2006: 499-502 - [c135]Thomas D. Richardson, Chrysostomos Nicopoulos, Dongkook Park, Narayanan Vijaykrishnan, Yuan Xie, Chita R. Das, Vijay Degalahal:
A Hybrid SoC Interconnect with Dynamic TDMA-Based Transaction-Less Buses and On-Chip Networks. VLSI Design 2006: 657-664 - [e1]Gang Qu, Yehea I. Ismail, Narayanan Vijaykrishnan, Hai Zhou:
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30 - May 1, 2006. ACM 2006, ISBN 1-59593-347-6 [contents] - 2005
- [j34]Theocharis Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin:
Networks on Chip (NoC): Interconnects of Next Generation Systems on Chip. Adv. Comput. 63: 36-92 (2005) - [j33]Srinivasan Murali, Theo Theocharides, Narayanan Vijaykrishnan, Mary Jane Irwin, Luca Benini, Giovanni De Micheli:
Analysis of Error Recovery Schemes for Networks on Chips. IEEE Des. Test Comput. 22(5): 434-442 (2005) - [j32]Eric J. Swankoski, Narayanan Vijaykrishnan, Richard R. Brooks, Mahmut T. Kandemir, Mary Jane Irwin:
Symmetric encryption in reconfigurable and custom hardware. Int. J. Embed. Syst. 1(3/4): 205-217 (2005) - [j31]Emanuele Lattanzi, Aman Gayasen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Luca Benini, Alessandro Bogliolo:
Improving Java performance using dynamic method migration on FPGAs. Int. J. Embed. Syst. 1(3/4): 228-236 (2005) - [j30]Mary Jane Irwin, Narayanan Vijaykrishnan:
Editorial. ACM J. Emerg. Technol. Comput. Syst. 1(1): 1-6 (2005) - [j29]Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
An integer linear programming-based tool for wireless sensor networks. J. Parallel Distributed Comput. 65(3): 247-260 (2005) - [j28]Eun Jung Kim, Greg M. Link, Ki Hwan Yum, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Chita R. Das:
A Holistic Approach to Designing Energy-Efficient Cluster Interconnects. IEEE Trans. Computers 54(6): 660-671 (2005) - [j27]Shengqi Yang, Wayne H. Wolf, Narayanan Vijaykrishnan:
Power and Performance Analysis of Motion Estimation Based on Hardware and Software Realizations. IEEE Trans. Computers 54(6): 714-726 (2005) - [j26]Ismail Kadayif, Mahmut T. Kandemir, Guilin Chen, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam:
Compiler-directed high-level energy estimation and optimization. ACM Trans. Embed. Comput. Syst. 4(4): 819-850 (2005) - [j25]Jie S. Hu, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Analyzing data reuse for cache reconfiguration. ACM Trans. Embed. Comput. Syst. 4(4): 851-876 (2005) - [j24]Vijay Degalahal, Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Soft errors issues in low-power caches. IEEE Trans. Very Large Scale Integr. Syst. 13(10): 1157-1166 (2005) - [c134]Jongman Kim, Dongkook Park, Chrysostomos Nicopoulos, Narayanan Vijaykrishnan, Chita R. Das:
Design and analysis of an NoC architecture from performance, reliability and energy perspective. ANCS 2005: 173-182 - [c133]Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
Designing reliable circuit in the presence of soft errors. ASP-DAC 2005: 1 - [c132]Shengqi Yang, Wayne H. Wolf, Wenping Wang, Narayanan Vijaykrishnan, Yuan Xie:
Low-leakage robust SRAM cell design for sub-100nm technologies. ASP-DAC 2005: 539-544 - [c131]Suresh Srinivasan, Aman Gayasen, Narayanan Vijaykrishnan, Tim Tuan:
Leakage control in FPGA routing fabric. ASP-DAC 2005: 661-664 - [c130]E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti, Narayanan Vijaykrishnan:
Cluster-based detection of SEU-caused errors in LUTs of SRAM-based FPGAs. ASP-DAC 2005: 1200-1203 - [c129]Nagu R. Dhanwada, Ing-Chao Lin, Vijaykrishnan Narayanan:
A power estimation methodology for systemC transaction level models. CODES+ISSS 2005: 142-147 - [c128]Jongman Kim, Dongkook Park, Theo Theocharides, Narayanan Vijaykrishnan, Chita R. Das:
A low latency router supporting adaptivity for on-chip interconnects. DAC 2005: 559-564 - [c127]Aman Gayasen, Narayanan Vijaykrishnan, Mary Jane Irwin:
Exploring technology alternatives for nano-scale FPGA interconnects. DAC 2005: 921-926 - [c126]Shengqi Yang, Wayne H. Wolf, Narayanan Vijaykrishnan, Dimitrios N. Serpanos, Yuan Xie:
Power Attack Resistant Cryptosystem Design: A Dynamic Voltage and Frequency Switching Approach. DATE 2005: 64-69 - [c125]Suresh Srinivasan, Lin Li, Narayanan Vijaykrishnan:
Simultaneous Partitioning and Frequency Assignment for On-Chip Bus Architectures. DATE 2005: 218-223 - [c124]Yuh-Fang Tsai, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
Leakage-Aware Interconnect for On-Chip Network. DATE 2005: 230-231 - [c123]Greg M. Link, Narayanan Vijaykrishnan:
Hotspot Prevention Through Runtime Reconfiguration in Network-On-Chip. DATE 2005: 648-649 - [c122]Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Thermal-Aware Task Allocation and Scheduling for Embedded Systems. DATE 2005: 898-899 - [c121]Jie S. Hu, Feihui Li, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Compiler-Directed Instruction Duplication for Soft Error Detection. DATE 2005: 1056-1057 - [c120]E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti, Narayanan Vijaykrishnan:
Efficient methodology for detection and correction of SEU-based interconnect errors in FPGAs using partial reconfiguration (abstract only). FPGA 2005: 265 - [c119]Yuh-Fang Tsai, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin:
Three-Dimensional Cache Design Exploration Using 3DCacti. ICCD 2005: 519-524 - [c118]Wei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vijaykrishnan, Nagu R. Dhanwada, John Conner:
Temperature-Aware Voltage Islands Architecting in System-on-Chip Design. ICCD 2005: 689-696 - [c117]E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti, Narayanan Vijaykrishnan:
Online Detection and Diagnosis of Multiple Configuration Upsets in LUTs of SRAM-Based FPGAs. IPDPS 2005 - [c116]Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Charles Addo-Quaye, Theo Theocharides, Mary Jane Irwin:
Thermal-Aware Floorplanning Using Genetic Algorithms. ISQED 2005: 634-639 - [c115]Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin:
High Performance Array Processor for Video Decoding. ISVLSI 2005: 28-33 - [c114]Hendra Saputra, Ozcan Ozturk, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Richard R. Brooks:
A Data-Driven Approach for Embedded Security. ISVLSI 2005: 104-109 - [c113]Narayanan Vijaykrishnan:
Soft errors: is the concern for soft-errors overblown? ITC 2005: 2 - [c112]Suresh Srinivasan, Federico Angiolini, Martino Ruggiero, Luca Benini, Narayanan Vijaykrishnan:
Simultaneous memory and bus partitioning for SoC architectures. SoCC 2005: 125-128 - [c111]Theo Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin:
Implementing LDPC Decoding on Network-on-Chip. VLSI Design 2005: 134-137 - [c110]Shengqi Yang, Wayne H. Wolf, Narayanan Vijaykrishnan, Yuan Xie, Wenping Wang:
Accurate Stacking Effect Macro-Modeling of Leakage Power in Sub-100nm Circuits. VLSI Design 2005: 165-170 - [c109]Kevin M. Irick, Wei Xu, Narayanan Vijaykrishnan, Mary Jane Irwin:
A Nanosensor Array-Based VLSI Gas Discriminator. VLSI Design 2005: 241-246 - [c108]Yuh-Fang Tsai, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
Influence of Leakage Reduction Techniques on Delay/Leakage Uncertainty. VLSI Design 2005: 374-379 - [c107]E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti, Narayanan Vijaykrishnan:
Detecting SEU-Caused Routing Errors in SRAM-Based FPGAs. VLSI Design 2005: 736-741 - 2004
- [j23]Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Optimizing Leakage Energy Consumption in Cache Bitlines. Des. Autom. Embed. Syst. 9(1): 5-18 (2004) - [j22]Wei Zhang, Jie S. Hu, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Reducing instruction cache energy consumption using a compiler-based strategy. ACM Trans. Archit. Code Optim. 1(1): 3-33 (2004) - [j21]Mahmut T. Kandemir, J. Ramanujam, Mary Jane Irwin, Narayanan Vijaykrishnan, Ismail Kadayif, Amisha Parikh:
A compiler-based approach for dynamically managing scratch-pad memories in embedded systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(2): 243-260 (2004) - [j20]Guangyu Chen, Byung-Tae Kang, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Rajarathnam Chandramouli:
Studying Energy Trade Offs in Offloading Computation/Compilation in Java-Enabled Mobile Devices. IEEE Trans. Parallel Distributed Syst. 15(9): 795-809 (2004) - [j19]Christian Piguet, Narayanan Vijaykrishnan:
Guest Editorial. IEEE Trans. Very Large Scale Integr. Syst. 12(2): 129-130 (2004) - [j18]Christian Piguet, Narayanan Vijaykrishnan:
Guest Editorial. IEEE Trans. Very Large Scale Integr. Syst. 12(3): 233-234 (2004) - [j17]Yuh-Fang Tsai, D. E. Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin:
Characterization and modeling of run-time techniques for leakage power reduction. IEEE Trans. Very Large Scale Integr. Syst. 12(11): 1221-1233 (2004) - [j16]Amisha Parikh, Soontae Kim, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Instruction Scheduling for Low Power. J. VLSI Signal Process. 37(1): 129-149 (2004) - [j15]J. Juran, Ali R. Hurson, Narayanan Vijaykrishnan, Soontae Kim:
Data Organization and Retrieval on Parallel Air Channels: Performance and Energy Issues. Wirel. Networks 10(2): 183-195 (2004) - [c106]Yuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Reliability-Aware Co-Synthesis for Embedded Systems. ASAP 2004: 41-50 - [c105]Guilin Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin:
Analyzing heap error behavior in embedded JVM environments. CODES+ISSS 2004: 230-235 - [c104]Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
A Crosstalk Aware Interconnect with Variable Cycle Transmission. DATE 2004: 102-107 - [c103]Jie S. Hu, Narayanan Vijaykrishnan, Soontae Kim, Mahmut T. Kandemir, Mary Jane Irwin:
Scheduling Reusable Instructions for Power Reduction. DATE 2004: 148-155 - [c102]Aman Gayasen, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Tim Tuan:
Reducing leakage energy in FPGAs using region-constrained placement. FPGA 2004: 51-58 - [c101]Aman Gayasen, K. Lee, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Tim Tuan:
A Dual-VDD Low Power FPGA Architecture. FPL 2004: 145-157 - [c100]E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti, Vijaykrishnan Narayanan:
A novel CLB architecture to detect and correct SEU in LUTs of SRAM-based FPGAs. FPT 2004: 121-128 - [c99]Wei Xu, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
Design of a nanosensor array architecture. ACM Great Lakes Symposium on VLSI 2004: 298-303 - [c98]Jie S. Hu, Narayanan Vijaykrishnan, Mary Jane Irwin:
Exploring Wakeup-Free Instruction Scheduling. HPCA 2004: 232-243 - [c97]Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin:
Efficient VLSI implementation of inverse discrete cosine transform [image coding applications]. ICASSP (5) 2004: 177-180 - [c96]Suresh Srinivasan, Aman Gayasen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Yuan Xie, Mary Jane Irwin:
Improving soft-error tolerance of FPGA configuration bits. ICCAD 2004: 107-110 - [c95]Frank Ghenassia, Narayanan Vijaykrishnan, Mary Jane Irwin:
Analyzing software influences on substrate noise: an ADC perspective. ICCAD 2004: 916-922 - [c94]Wei-Lun Hung, Charles Addo-Quaye, Theo Theocharides, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin:
Thermal-Aware IP Virtualization and Placement for Networks-on-Chip Architecture. ICCD 2004: 430-437 - [c93]Shengqi Yang, Wayne H. Wolf, Narayanan Vijaykrishnan:
Search speed and power driven integrated software and hardware optimizations for motion estimation algorithms. ICME 2004: 707-710 - [c92]Emanuele Lattanzi, Aman Gayasen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Luca Benini, Alessandro Bogliolo:
Improving Java Performance Using Dynamic Method Migration on FPGAs. IPDPS 2004 - [c91]Eric J. Swankoski, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
A Parallel Architecture for Secure FPGA Symmetric Encryption. IPDPS 2004 - [c90]Lin Li, Vijay Degalahal, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Soft error and energy consumption interactions: a data cache perspective. ISLPED 2004: 132-137 - [c89]Vijay Degalahal, Rajaraman Ramanarayanan, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
The Effect of Threshold Voltages on the Soft Error Rate. ISQED 2004: 503-508 - [c88]Matthew Pirretti, Greg M. Link, Richard R. Brooks, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Fault Tolerant Algorithms for Network-On-Chip Interconnect. ISVLSI 2004: 46-51 - [c87]Theo Theocharides, Greg M. Link, Eric J. Swankoski, Narayanan Vijaykrishnan, Mary Jane Irwin, Herman Schmit:
Evaluating Alternative Implementations for LDPC Decoder Check Node Function. ISVLSI 2004: 77-82 - [c86]Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Field level analysis for heap space optimization in embedded java environments. ISMM 2004: 131-142 - [c85]Hendra Saputra, Guangyu Chen, Richard R. Brooks, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Code protection for resource-constrained embedded devices. LCTES 2004: 240-248 - [c84]Byung-Tae Kang, Narayanan Vijaykrishnan, Mary Jane Irwin, Theocharis Theocharides:
Power-efficient implementation of turbo decoder in SDR system. SoCC 2004: 119-122 - [c83]Theocharis Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin, Vamsi Srikantam:
A generic reconfigurable neural network architecture as a network on chip. SoCC 2004: 191-194 - [c82]Yuh-Fang Tsai, Ananth Hegde Ankadi, Narayanan Vijaykrishnan, Mary Jane Irwin, Theocharis Theocharides:
ChipPower: an architecture-level leakage simulator. SoCC 2004: 395-398 - [c81]Theo Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf:
Embedded Hardware Face Detection. VLSI Design 2004: 133- - [c80]M. DeRenzo, Mary Jane Irwin, Narayanan Vijaykrishnan:
Designing Leakage Aware Multipliers. VLSI Design 2004: 654-657 - [c79]Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf:
An Architecture for Motion Estimation in the Transform Domain. VLSI Design 2004: 1077-1082 - [p1]Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Ibrahim Kolcu:
Reducing Energy Consumption in Chip Multiprocessors Using Workload Variations. Ultra Low-Power Electronics and Design 2004: 123-140 - 2003
- [j14]Nam Sung Kim, Todd M. Austin, David T. Blaauw, Trevor N. Mudge, Krisztián Flautner, Jie S. Hu, Mary Jane Irwin, Mahmut T. Kandemir, Narayanan Vijaykrishnan:
Leakage Current: Moore's Law Meets Static Power. Computer 36(12): 68-75 (2003) - [j13]Lin Li, Ismail Kadayif, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Anand Sivasubramaniam:
Managing Leakage Energy in Cache Hierarchies. J. Instr. Level Parallelism 5 (2003) - [j12]Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Hyun Suk Kim, Wu Ye, David Duarte:
Evaluating Integrated Hardware-Software Optimizations Using a Unified Energy Estimation Framework. IEEE Trans. Computers 52(1): 59-76 (2003) - [j11]Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin:
Partitioned instruction cache architecture for energy efficiency. ACM Trans. Embed. Comput. Syst. 2(2): 163-185 (2003) - [c78]Ananth Hegde, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
VL-CDRAM: variable line sized cached DRAMs. CODES+ISSS 2003: 132-137 - [c77]Guangyu Chen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Mario Wolczko:
Tracking object life cycle for leakage energy optimization. CODES+ISSS 2003: 213-218 - [c76]Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin:
Implications of technology scaling on leakage reduction techniques. DAC 2003: 187-190 - [c75]Hendra Saputra, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Richard R. Brooks, Soontae Kim, Wei Zhang:
Masking the Energy Behavior of DES Encryption. DATE 2003: 10084-10089 - [c74]Wei Zhang, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Vivek De:
Compiler Support for Reducing Leakage Energy Consumption. DATE 2003: 11146-11147 - [c73]Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Ismail Kadayif:
CCC: Crossbar Connected Caches for Reducing Energy Consumption of On-Chip Multiprocessors. DSD 2003: 41-49 - [c72]Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Adapative Error Protection for Energy Efficiency. ICCAD 2003: 2-7 - [c71]Victor Delaluz, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin, Narayanan Vijaykrishnan:
Reducing dTLB Energy Through Dynamic Resizing. ICCD 2003: 358-363 - [c70]Amol Bhatkar, Rajarathnam Chandramouli, Narayanan Vijaykrishnan, Mary Jane Irwin:
Computation and transmission energy modeling through profiling for MPEG4 video transmission. ICME 2003: 281-284 - [c69]Sudhanva Gurumurthi, Ning An, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Energy and Performance Considerations in Work Partitioning for Mobile Spatial Queries. IPDPS 2003: 33 - [c68]Guilin Chen, Byung-Tae Kang, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Rajarathnam Chandramouli:
Energy-Aware Compilation and Execution in Java-Enabled Mobile Devices. IPDPS 2003: 34 - [c67]Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Erik Brockmeyer, Francky Catthoor, Mary Jane Irwin:
Estimating influence of data layout optimizations on SDRAM energy consumption. ISLPED 2003: 40-43 - [c66]Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Irwin, Lizy Kurian John:
On load latency in low-power caches. ISLPED 2003: 258-261 - [c65]Jie S. Hu, A. Nadgir, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir:
Exploiting program hotspots and code sequentiality for instruction cache leakage management. ISLPED 2003: 402-407 - [c64]Eun Jung Kim, Ki Hwan Yum, Greg M. Link, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Mazin S. Yousif, Chita R. Das:
Energy optimization techniques in cluster interconnects. ISLPED 2003: 459-464 - [c63]Sudhanva Gurumurthi, Jianyong Zhang, Anand Sivasubramaniam, Mahmut T. Kandemir, Hubertus Franke, Narayanan Vijaykrishnan, Mary Jane Irwin:
Interplay of energy and performance for disk arrays running transaction processing workloads. ISPASS 2003: 123-132 - [c62]Jie S. Hu, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir:
Using Dynamic Branch Behavior for Power-Efficient Instruction Fetch. ISVLSI 2003: 127-132 - [c61]Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Adapting instruction level parallelism for optimizing leakage in VLIW architectures. LCTES 2003: 275-283 - [c60]Herman Schmit, Thomas Kroll, Max Khusid, Ivan S. Kourtev, Narayanan Vijaykrishnan, David L. Landis:
The Sandbox Design Experience Course. MSE 2003: 39-40 - [c59]Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Bernd Mathiske, Mario Wolczko:
Heap compression for memory-constrained Java environments. OOPSLA 2003: 282-301 - [c58]Vijay Degalahal, Rajaraman Ramanarayanan, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
Effect of Power Optimizations on Soft Error Rate. VLSI-SoC (Selected Papers) 2003: 1-20 - [c57]Narayanan Vijaykrishnan:
Energy Efficient and Reliable System Design. VLSI-SOC 2003: 6-9 - [c56]Vijay Degalahal, Narayanan Vijaykrishnan, Mary Jane Irwin:
Analyzing Soft Errors in Leakage Optimized SRAM Design. VLSI Design 2003: 227-233 - 2002
- [j10]Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf:
Using Memory Compression for Energy Reduction in an Embedded Java System. J. Circuits Syst. Comput. 11(5): 537-556 (2002) - [j9]Guangyu Chen, R. Shetty, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Mario Wolczko:
Tuning garbage collection for reducing memory system energy in an embedded java environment. ACM Trans. Embed. Comput. Syst. 1(1): 27-55 (2002) - [j8]D. E. Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin:
A clock power model to evaluate impact of architectural and technology optimizations. IEEE Trans. Very Large Scale Integr. Syst. 10(6): 844-855 (2002) - [j7]Ning An, Sudhanva Gurumurthi, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Energy-performance trade-offs for spatial access methods on memory-resident data. VLDB J. 11(3): 179-197 (2002) - [c55]Lin Li, Ismail Kadayif, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Anand Sivasubramaniam:
Leakage Energy Management in Cache Hierarchies. IEEE PACT 2002: 131-140 - [c54]Tao Li, Lizy Kurian John, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Juan Rubio:
Understanding and improving operating system effects in control flow prediction. ASPLOS 2002: 68-80 - [c53]Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf:
Energy savings through compression in embedded Java environments. CODES 2002: 163-168 - [c52]Victor Delaluz, Anand Sivasubramaniam, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Scheduler-based DRAM energy management. DAC 2002: 697-702 - [c51]Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam:
EAC: A Compiler Framework for High-Level Energy Estimation and Optimization. DATE 2002: 436-442 - [c50]Jie S. Hu, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Power-Efficient Trace Caches. DATE 2002: 1091 - [c49]David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin:
A Complete Phase-Locked Loop Power Consumption Model. DATE 2002: 1108 - [c48]Guangyu Chen, R. Shetty, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Mario Wolczko:
Tuning Garbage Collection in an Embedded Java Environment. HPCA 2002: 92-103 - [c47]Sudhanva Gurumurthi, Anand Sivasubramaniam, Mary Jane Irwin, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Tao Li, Lizy Kurian John:
Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach. HPCA 2002: 141-150 - [c46]Byung-Tae Kang, Vijaykrishnan Narayanan, Mary Jane Irwin, Rajarathnam Chandramouli:
Power efficient adaptive M-QAM design using adaptive pipelined analog-to-digital converter. ICASSP 2002: 2705-2708 - [c45]David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin, Hyun Suk Kim, Grant McFarland:
Impact of Scaling on the Effectiveness of Dynamic Power Reduction Schemes. ICCD 2002: 382-387 - [c44]Anand Sivasubramaniam, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Designing Energy-Efficient Software. IPDPS 2002 - [c43]Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Hardware-Software Co-Adaptation for Data-Intensive Embedded Applications. ISVLSI 2002: 20-25 - [c42]David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin:
Impact of Technology Scaling in the Clock System Power. ISVLSI 2002: 59-64 - [c41]Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Mario Wolczko:
Adaptive Garbage Collection for Battery-Operated Environments. Java Virtual Machine Research and Technology Symposium 2002: 1-12 - [c40]Hendra Saputra, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Jie S. Hu, Chung-Hsing Hsu, Ulrich Kremer:
Energy-conscious compilation based on voltage scaling. LCTES-SCOPES 2002: 2-11 - [c39]Jie S. Hu, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Hendra Saputra, Wei Zhang:
Compiler-directed cache polymorphism. LCTES-SCOPES 2002: 165-174 - [c38]Wei Zhang, Jie S. Hu, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Compiler-directed instruction cache leakage optimization. MICRO 2002: 208-218 - [c37]David Duarte, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mary Jane Irwin:
Evaluating Run-Time Techniques for Leakage Power Reduction. ASP-DAC/VLSI Design 2002: 31-38 - [c36]Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam, Ibrahim Kolcu:
Compiler-Directed Array Interleaving for Reducing Energy in Multi-Bank Memories. ASP-DAC/VLSI Design 2002: 288- - 2001
- [j6]Ramesh Radhakrishnan, Narayanan Vijaykrishnan, Lizy Kurian John, Anand Sivasubramaniam, Juan Rubio, Jyotsna Sabarinathan:
Java Runtime Systems: Characterization and Architectural Implications. IEEE Trans. Computers 50(2): 131-146 (2001) - [j5]Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin:
Hardware and Software Techniques for Controlling DRAM Power Modes. IEEE Trans. Computers 50(11): 1154-1173 (2001) - [j4]Benjamin Bishop, V. Lyuboslavsky, Narayanan Vijaykrishnan, Mary Jane Irwin:
Design considerations for databus charge recovery. IEEE Trans. Very Large Scale Integr. Syst. 9(1): 104-106 (2001) - [j3]Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wu Ye:
Influence of compiler optimizations on system power. IEEE Trans. Very Large Scale Integr. Syst. 9(6): 801-804 (2001) - [j2]G. Esakkimuthu, Hyun Suk Kim, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Investigating Memory System Energy Behavior Using Software and Hardware Optimizations. VLSI Design 12(2): 151-165 (2001) - [c35]Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Energy-efficient instruction cache using page-based placement. CASES 2001: 229-237 - [c34]Mahmut T. Kandemir, J. Ramanujam, Mary Jane Irwin, Narayanan Vijaykrishnan, Ismail Kadayif, Amisha Parikh:
Dynamic Management of Scratch-Pad Memory Space. DAC 2001: 690-695 - [c33]Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin:
DRAM Energy Management Using Software and Hardware Directed Power Mode Control. HPCA 2001: 159-169 - [c32]Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
A Framework for Energy Estimation of VLIW Architecture. ICCD 2001: 40-45 - [c31]Samarjeet Singh Tomar, Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Use of Local Memory for Efficient Java Execution. ICCD 2001: 468-476 - [c30]R. Athavale, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Influence of Array Allocation Mechanisms on Memory System Energy. IPDPS 2001: 3 - [c29]Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin, E. Geethanjali:
Power-aware partitioned cache architectures. ISLPED 2001: 64-67 - [c28]Narayanan Vijaykrishnan, Mahmut T. Kandemir, Soontae Kim, Samarjeet Singh Tomar, Anand Sivasubramaniam, Mary Jane Irwin:
Energy Behavior of Java Applications from the Memory Perspective. Java Virtual Machine Research and Technology Symposium 2001: 207-220 - [c27]Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, J. Ramanujam:
Morphable Cache Architectures: Potential Benefits. LCTES/OM 2001: 128-137 - [c26]Wei Zhang, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, David Duarte, Yuh-Fang Tsai:
Exploiting VLIW schedule slacks for dynamic and leakage energy reduction. MICRO 2001: 102-113 - [c25]Pradeep K. Khosla, Herman Schmit, Mary Jane Irwin, Narayanan Vijaykrishnan, Tom Cain, Steven P. Levitan, Dave Landis:
SoC Design Skills: Collaboration Builds a Stronger SoC Design Team. MSE 2001: 42-43 - [c24]Ismail Kadayif, T. Chinoda, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam:
vEC: virtual energy counters. PASTE 2001: 28-31 - [c23]Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Jagannathan Ramanujam:
Morphable Cache Architectures: Potential Benefits. OM@PLDI 2001: 128-137 - [c22]Ning An, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Sudhanva Gurumurthi:
Analyzing energy behavior of spatial access methods for memory-resident data. VLDB 2001: 411-420 - [c21]David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir:
Formulation and Validation of an Energy Dissipation Model for the Clock Generation Circuitry and Distribution Networks. VLSI Design 2001: 248-253 - 2000
- [c20]Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Energy-oriented compiler optimizations for partitioned memory architectures. CASES 2000: 138-147 - [c19]Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wu Ye:
Influence of compiler optimizations on system power. DAC 2000: 304-307 - [c18]Wu Ye, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
The design and use of simplepower: a cycle-accurate energy estimation tool. DAC 2000: 340-345 - [c17]Jeyran Hezavei, Narayanan Vijaykrishnan, Mary Jane Irwin:
A comparative study of power efficient SRAM designs. ACM Great Lakes Symposium on VLSI 2000: 117-122 - [c16]Amisha Parikh, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Energy-Aware Instruction Scheduling. HiPC 2000: 335-344 - [c15]J. Juran, Ali R. Hurson, Narayanan Vijaykrishnan, S. Boonsiriwattanakul:
Data Organization and Retrieval on Parallel Air Channels. HiPC 2000: 501-510 - [c14]Ramesh Radhakrishnan, Narayanan Vijaykrishnan, Lizy Kurian John, Anand Sivasubramaniam:
Architectural Issues in Java Runtime Systems. HPCA 2000: 387-398 - [c13]Tao Li, Lizy Kurian John, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Jyotsna Sabarinathan, Anupama Murthy:
Using complete system simulation to characterize SPECjvm98 benchmarks. ICS 2000: 22-33 - [c12]Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Hyun Suk Kim, Wu Ye:
Energy-driven integrated hardware-software optimizations using SimplePower. ISCA 2000: 95-106 - [c11]G. Esakkimuthu, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Memory system energy (poster session): influence of hardware-software optimizations. ISLPED 2000: 244-246 - [c10]Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Hyun Suk Kim:
Experimental Evaluation of Energy Behavior of Iteration Space Tiling. LCPC 2000: 142-157 - [c9]Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Hyun Suk Kim:
Towards Energy-Aware Iteration Space Tiling. LCTES 2000: 211-215 - [c8]Mary Jane Irwin, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Anand Sivasubramaniam:
A Holistic Approach to System Level Energy Optimization. PATMOS 2000: 88-107
1990 – 1999
- 1999
- [c7]Narayanan Vijaykrishnan, N. Ranganathan:
Tuning Branch Predictors to Support Virtual Method Invocation in Java. COOTS 1999: 217-228 - [c6]Vamsi Krishna, N. Ranganathan, Narayanan Vijaykrishnan:
Energy Efficient Datapath Synthesis Using Dynamic Frequency Clocking and Multiple Voltages. VLSI Design 1999: 440- - 1998
- [j1]Nagarajan Ranganathan, Narayanan Vijaykrishnan, N. Bhavanishankar:
A linear array processor with dynamic frequency clocking for image processing applications. IEEE Trans. Circuits Syst. Video Technol. 8(4): 435-445 (1998) - [c5]Narayanan Vijaykrishnan, N. Ranganathan, Ravi Gadekarla:
Object-Oriented Architectural Support for a Java Processor. ECOOP 1998: 330-354 - 1996
- [c4]N. Ranganathan, Narayanan Vijaykrishnan, N. Bhavanishankar:
A VLSI array architecture with dynamic frequency clocking. ICCD 1996: 137-140 - [c3]Narayanan Vijaykrishnan, Nagarajan Ranganathan, N. Bhavanishankar:
DFLAP: a dynamic frequency linear array processor. ICIP (2) 1996: 1007-1010 - [c2]N. Ranganathan, N. Bhavanishankar, Narayanan Vijaykrishnan:
A dynamic frequency linear array processor for image processing. ICPR 1996: 611-615 - [c1]Narayanan Vijaykrishnan, N. Ranganathan:
SUBGEN: a genetic approach for subcircuit extraction. VLSI Design 1996: 343-345
Coauthor Index
Matthew Cotter
aka: Matthew J. Cotter
aka: Matthew J. Cotter
[i26] [i18] [j116] [j113] [j111] [j106] [j101] [j99] [c300] [j98] [j94] [j93] [j92] [j91] [c297] [c295] [c294] [j86] [c291] [c281] [c280] [c277] [j85] [j84] [c275] [c274] [c266] [c263] [c262] [j79] [j78] [j77] [c256] [c251] [c250] [c248] [c241] [c233] [j70] [c228] [c227] [c222] [c218] [c215] [j64] [c213] [c203] [c197] [c191] [c178]
Michael DeBole
aka: Michael V. DeBole
aka: Michael V. DeBole
[c289] [j79] [c237] [c233] [j63] [j62] [c212] [j58] [j55] [j54] [c199] [c192] [j51] [j50] [c187] [c185] [c179] [j47] [j46] [j44] [j41] [c166] [c165] [c164] [c161] [c160] [i3] [i2] [j38] [j37] [j36] [j35] [c158] [c156] [c155] [c149] [c143] [c142] [c136] [j34] [j33] [j32] [j30] [j29] [j28] [j26] [j25] [j24] [c133] [c127] [c124] [c122] [c121] [c119] [c116] [c115] [c111] [c109] [c108] [j23] [j22] [j21] [j20] [j17] [j16] [c106] [c105] [c104] [c103] [c102] [c101] [c99] [c98] [c97] [c96] [c95] [c94] [c91] [c90] [c89] [c88] [c87] [c86] [c85] [c84] [c83] [c82] [c81] [c80] [c79] [p1] [j14] [j13] [j12] [j11] [c78] [c77] [c76] [c75] [c74] [c73] [c72] [c71] [c70] [c69] [c68] [c67] [c66] [c65] [c64] [c63] [c62] [c61] [c59] [c58] [c56] [j10] [j9] [j8] [j7] [c55] [c53] [c52] [c51] [c50] [c49] [c48] [c47] [c46] [c45] [c44] [c43] [c42] [c41] [c40] [c39] [c38] [c37] [c36] [j5] [j4] [j3] [j2] [c35] [c34] [c33] [c32] [c31] [c30] [c29] [c28] [c27] [c26] [c25] [c24] [c23] [c22] [c21] [c20] [c19] [c18] [c17] [c16] [c12] [c11] [c10] [c9] [c8]
Nicholas Jao
aka: Nicholas Anton Jao
aka: Nicholas Anton Jao
Mahmut T. Kandemir
aka: Mahmut Taylan Kandemir
aka: Mahmut Taylan Kandemir
[j140] [c383] [i23] [c368] [c360] [c355] [i17] [j124] [c350] [c340] [i6] [j119] [c334] [j109] [c316] [c307] [c298] [c278] [j77] [c241] [c234] [c218] [j62] [j60] [j58] [j57] [j54] [c199] [j48] [j47] [j45] [j42] [j41] [c173] [c162] [i3] [j39] [j36] [c158] [c153] [c150] [c142] [c138] [j32] [j31] [j29] [j28] [j26] [j25] [j24] [c122] [c121] [c114] [j23] [j22] [j21] [j20] [j16] [c106] [c105] [c104] [c103] [c102] [c101] [c96] [c92] [c91] [c90] [c88] [c86] [c85] [p1] [j14] [j13] [j12] [j11] [c78] [c77] [c75] [c74] [c73] [c72] [c71] [c69] [c68] [c67] [c65] [c64] [c63] [c62] [c61] [c59] [j10] [j9] [j7] [c55] [c53] [c52] [c51] [c50] [c48] [c47] [c44] [c43] [c41] [c40] [c39] [c38] [c36] [j5] [j3] [j2] [c35] [c34] [c33] [c32] [c31] [c30] [c29] [c28] [c27] [c26] [c24] [c23] [c22] [c21] [c20] [c19] [c18] [c16] [c12] [c11] [c10] [c9] [c8]
[j138] [j137] [j136] [j135] [c389] [c385] [c384] [j132] [j131] [c379] [c377] [c375] [c372] [c369] [c366] [i22] [j128] [c359] [i16] [i14] [i13] [i12] [j123] [j118] [c335] [c330] [c329] [j116] [j112] [j111] [j110] [j109] [j108] [j107] [c316] [c310] [j102] [j101] [j100] [c304] [c301] [c300] [c299] [c298] [j98] [j97] [j94] [j92] [c297] [c294] [c293] [c292] [j88] [c285] [c284] [c279] [c277] [j85] [c276] [c266] [c264] [c263] [c262] [c261]
[j140] [c386] [c383] [i25] [i24] [c360] [i17] [j124] [j122] [c350] [c340] [j121] [j119] [j117] [c337] [c334] [c331] [c329] [c328] [j116] [j115] [j112] [c324] [c321] [c320] [c319] [c317] [j109] [j108] [j107] [c316] [c314] [c313] [c312] [c310] [c309] [c308] [c307] [c305] [j106] [j104] [j101] [j100] [c304] [c302] [c299] [c298] [j98] [j97] [j94] [j92] [j90] [c297] [c296] [c294] [c293] [c292] [j88] [c290] [c288] [c287] [c286] [c285] [c284] [c281] [c279] [c278] [c276] [c273] [c272] [c271] [c270] [c269] [c268] [c267]
Srivatsa Rangachar Srinivasa
aka: Srivatsa Srinivasa
aka: Srivatsa Srinivasa
Theocharis Theocharides
aka: Theo Theocharides
aka: Theo Theocharides
Marilyn Wolf
aka: Wayne H. Wolf
aka: Wayne H. Wolf
[j109] [c316] [j100] [c304] [c298] [j97] [j88] [c285] [c284] [c282] [c279] [j82] [c264] [j78] [c258] [c254] [j72] [c240] [c235] [j70] [j67] [c227] [c222] [c220] [c217] [p2] [j62] [j59] [j58] [j55] [c202] [c201] [c192] [j51] [j50] [j49] [c185] [c183] [c182] [c181] [c179] [j46] [j41] [c170] [c169] [c168] [c166] [c165] [c161] [i3] [i2] [j40] [c159] [c157] [c155] [c150] [c149] [c146] [c145] [c136] [c135] [c133] [c132] [c126] [c124] [c122] [c119] [c118] [c116] [c110] [c108] [c106] [c99] [c96] [c94] [c89] [c58]
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