article

Search space definition and exploration for nonuniform data reuse opportunities in data-dominant applications

Authors:

Tanja Van Achteren,

Francky Catthoor,

Rudy Lauwereins,

Geert DeconinckAuthors Info & Claims

ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 8, Issue 1

Pages 125 - 139

https://doi.org/10.1145/606603.606610

Published: 01 January 2003 Publication History

Abstract

Efficient exploitation of temporal locality in the memory accesses on array signals can have a very large impact on the power consumption in embedded data dominated applications. The effective use of an optimized custom memory hierarchy or a customized software controlled mapping on a predefined hierarchy is crucial for this. Only recently have effective systematic techniques to deal with this specific design step begun to appear. They are still limited in their exploration scope. In this paper we construct the design space by introducing three parameters which determine how and when copies are made between different levels in a hierarchy, and determine their impact on the total memory size, storage-related power consumption, and code complexity. Strategies are then established for an efficient exploration, such that cost-effective solutions for the memory size/power trade-off can be achieved. The effectiveness of the techniques is demonstrated for several real-life image processing algorithms.

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Cited By

Issenin IBrockmeyer EMiranda MDutt N(2007)DRDUACM Transactions on Design Automation of Electronic Systems10.1145/1230800.123080712:2(15-es)Online publication date: 1-Apr-2007
https://dl.acm.org/doi/10.1145/1230800.1230807
Hu QVandecappelle APalkovic MKjeldsberg PBrockmeyer ECatthoor FHirose F(2006)Hierarchical memory size estimation for loop fusion and loop shifting in data-dominated applicationsProceedings of the 2006 Asia and South Pacific Design Automation Conference10.1145/1118299.1118442(606-611)Online publication date: 24-Jan-2006
https://dl.acm.org/doi/10.1145/1118299.1118442
Geelen BFerentinos ACatthoor FVandecappelle ALafruit GStouraitis TLauwereins RVerkest D(2006)Software-Controlled Scratchpad Mapping Strategies for Wavelet-Based Applications2006 IEEE Workshop on Signal Processing Systems Design and Implementation10.1109/SIPS.2006.352609(362-367)Online publication date: Oct-2006
https://doi.org/10.1109/SIPS.2006.352609
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Search space definition and exploration for nonuniform data reuse opportunities in data-dominant applications

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Published In

cover image ACM Transactions on Design Automation of Electronic Systems

ACM Transactions on Design Automation of Electronic Systems Volume 8, Issue 1

January 2003

139 pages

ISSN:1084-4309

EISSN:1557-7309

DOI:10.1145/606603

Issue’s Table of Contents

Copyright © 2003 ACM.

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Association for Computing Machinery

New York, NY, United States

Journal Family

ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 01 January 2003

Published in TODAES Volume 8, Issue 1

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Cited By

Issenin IBrockmeyer EMiranda MDutt N(2007)DRDUACM Transactions on Design Automation of Electronic Systems10.1145/1230800.123080712:2(15-es)Online publication date: 1-Apr-2007
https://dl.acm.org/doi/10.1145/1230800.1230807
Hu QVandecappelle APalkovic MKjeldsberg PBrockmeyer ECatthoor FHirose F(2006)Hierarchical memory size estimation for loop fusion and loop shifting in data-dominated applicationsProceedings of the 2006 Asia and South Pacific Design Automation Conference10.1145/1118299.1118442(606-611)Online publication date: 24-Jan-2006
https://dl.acm.org/doi/10.1145/1118299.1118442
Geelen BFerentinos ACatthoor FVandecappelle ALafruit GStouraitis TLauwereins RVerkest D(2006)Software-Controlled Scratchpad Mapping Strategies for Wavelet-Based Applications2006 IEEE Workshop on Signal Processing Systems Design and Implementation10.1109/SIPS.2006.352609(362-367)Online publication date: Oct-2006
https://doi.org/10.1109/SIPS.2006.352609
Issenin IBrockmeyer EMiranda MDutt N(2004)Data Reuse Analysis Technique for Software-Controlled Memory HierarchiesProceedings of the conference on Design, automation and test in Europe - Volume 110.5555/968878.968995Online publication date: 16-Feb-2004
https://dl.acm.org/doi/10.5555/968878.968995
Molina MRuiz-Sautua RMendias JHermida R(2004)Behavioural bitwise scheduling based on computational effort balancingProceedings Design, Automation and Test in Europe Conference and Exhibition10.1109/DATE.2004.1268930(684-685)Online publication date: 2004
https://doi.org/10.1109/DATE.2004.1268930
Issenin IBrockmeyer EMiranda MDutt N(2004)Data reuse analysis technique for software-controlled memory hierarchiesProceedings Design, Automation and Test in Europe Conference and Exhibition10.1109/DATE.2004.1268849(202-207)Online publication date: 2004
https://doi.org/10.1109/DATE.2004.1268849

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