ECE315 / ECE515

Lecture – 5 Date: 18.08.2016

• Common Source Amplifier

• MOSFET Amplifier Distortion
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Example – 1
Cc2: Coupling Capacitor → serves
One Realistic CS Amplifier Circuit: as perfect short circuit at all signal
Cc1: Coupling Capacitor → frequencies while blocking any dc
serves as perfect short circuit → this makes vo = vd
at all signal frequencies while
blocking any dc

CS: Bypass Capacitor →

(μF) range → provides
RL: Load Resistor → could be actual small impedances
resistor to which the output is required (ideally perfect short
or could be input resistance of another circuit) at all signal
amplifier stage where more than one frequencies
amplification stage is needed
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Example – 1 (contd.)
ig  0 Rin  RG

Rin
vi  vsig
Rin  Rsig

RG
 vi  vsig
RG  Rsig
Usually, RG is very high (of the vi  vsig
 vo   g mvgs  ro RD RL 
order of MΩ) and therefore: Now, vgs  vi
vo vo
 Av     g m  ro RD RL 
vin vgs
Open Loop Voltage Gain (ie, when there
is no feedback loop from o/p to the i/p): Avo   gm  ro RD 
RG
The overall voltage gain from the signal-source to the Gv   g m  ro RD RL 
load is: RG  Rsig
For the determination of Rout, the signal vsig has to be set to zero (replace
the signal generator with a short circuit) → simple inspection gives: Rout   ro RD 
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MOSFET Amplifier Distortion
Lets look at the last example. You needed
𝟏𝟓. 𝟎 𝑽 to perform a small-signal analysis to
𝒊𝑫 𝒕 = 𝑰𝑫 + 𝒊𝒅 (𝒕) = 𝟓𝑲
determine the small-signal open-circuit
voltage gain 𝐴𝑣 = 𝑣𝑜(𝑡) 𝑣𝑖 (𝑡)
𝒗𝑶 𝒕
= 𝑽𝑫𝑺 + 𝒗𝒐 (𝒕) • We found that vo (t )
the small-signal Avo 5.0
𝒗𝒊 (𝒕) vi (t )
𝑲 = 𝟎. 𝟐𝟓 𝒎𝑨 voltage gain is:
𝟒. 𝟎 𝑽 𝑽𝟐
• Say the input
𝑽𝑻 = 𝟐. 𝟎 𝑽 voltage to this vi (t ) Vi cosωt
amplifier is:
Q: What is the largest value that Vi can take without producing a distorted output?
A: Well, we know that the small-signal output is: vo (t ) Avo vi (t )
5.0Vi cosωt
BUT, this is not the output voltage!
→ The total output voltage is the sum of the small-signal output voltage and the DC
output voltage!
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MOSFET Amplifier Distortion (contd.)
• Note for this example, the DC output voltage is the DC
VO VD 10 V
drain voltage, and that its value is:
• Thus, the total output voltage is : vO (t ) VD vo (t )
10.0 5.0Vi cosωt

It is very important that you realize there

is a limit on both how high and how low
the total output voltage 𝑣𝑂 (𝑡) can go.

That’s right! If the total output voltage 𝑣𝑂 (𝑡) tries to

exceed these limits—even for a moment—the
MOSFET will leave saturation mode.

And leaving saturation mode results in

signal distortion!
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MOSFET Amplifier Distortion (contd.)
• Let’s break the problem down into two separate problems:

1) If total output voltage 𝑣𝑂 (𝑡) becomes too small, the MOSFET will enter
the triode mode
2) If total output voltage 𝑣𝑂 (𝑡) becomes too large, the MOSFET will enter
the cutoff mode

We’ll first consider problem 1.

• For a MOSFET to remain in saturation, 𝑣𝐷𝑆 (𝑡) must remain vDS t   VGS  VT
greater than the excess gate voltage 𝑉𝐺𝑆 − 𝑉𝑇 all the time 𝑡.
• Since the source terminal of the MOSFET in this circuit is vDS (t ) vD(t ) vO (t )
connected to ground, we know that 𝑉𝑆 = 0. Therefore: VGS  VG

• And so the MOSFET will remain in saturation only if the total

vO t   VGS  VT
output voltage remains larger than 𝑉𝐺𝑆 − 𝑉𝑇 = 𝑉𝐺 − 𝑉𝑇 .
• Thus, we conclude for this amplifier that the output “floor” is: vDS t   VGS  VT
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MOSFET Amplifier Distortion (contd.)
• Here, 𝑉𝐺𝑆 = 4.0 𝑉 and 𝑉𝑇 = 2.0 𝑉. Therefore: L  VG  Vt  4  2  2.0 V

• Thus, to remain in saturation, the total output voltage must

vO t   L  2.0 V
remain larger than the “floor” voltage at all time 𝑡.

• Since this total voltage is: vO (t ) 10.0 5.0 Vi cosωt

• we can determine the maximum • Since 𝑐𝑜𝑠𝜔𝑡 can be as large as 1.0,

value of small-signal input we find that the magnitude of the
magnitude: input voltage can be no larger than
1.6 V, i.e.,
10.0 5.0 Vi cosωt 2.0
Vi 1.6 V
8.0 5.0 Vi cosωt
If the input magnitude exceeds this value,
the MOSFET will (momentarily) leave the
Vi cosωt 1.6
saturation region and enter the dreaded
triode mode!
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MOSFET Amplifier Distortion (contd.)
Now let’s consider problem 2
• For the MOSFET to remain in saturation, the drain current must be greater than
zero 𝑖𝐷 > 0 . Otherwise, the MOSFET will enter cutoff mode.
• Applying Ohm’s Law to the drain resistor, VDD vO 15 vO
we find the drain current is: iD
R C 5
• it is evident that drain current is positive only if: vO 15 V
• In other words, the upper limit (i.e., the “ceiling”) on
L VDD 15.0V
the total output voltage is:
• Since this total voltage is: vO (t ) 10.0 5.0Vi cosωt
• we can conclude that in order for the MOSFET
10.0 5.0Vi cosωt 15.0
to remain in saturation mode:
• Therefore, we find: 5.0
Vi cosωt 1.0
5.0
• Since 𝑐𝑜𝑠𝜔𝑡 can be as large as 1.0, we find that the magnitude of
the input voltage can be no larger than: Vi 1.0 V
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MOSFET Amplifier Distortion (contd.)
If the input magnitude exceeds 1.0 V, the MOSFET will (momentarily)
leave the saturation and enter the cutoff region!
In summary:
1) If, 𝑉𝑖 > 1.6 𝑉, the MOSFET will at times enter triode, and distortion will occur!
2) If, 𝑉𝑖 > 1.0 𝑉, the MOSFET will at times enter cutoff, and even more distortion
will occur!

• To demonstrate this, let’s consider three examples:

vO (t )
1. 𝐕𝐢 < 𝟏. 𝟎 𝐕 L VDD 15

• The output signal in this case

remains between 𝑉𝐷𝐷 = 15.0𝑉 VO 10

and 𝑉𝐺 − 𝑉𝑇 = 2.0 𝑉 for all

time t. Therefore, the output
signal is not distorted. L VG VT 2
t
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MOSFET Amplifier Distortion (contd.)
2. 𝟏. 𝟔 𝐕 > 𝐕𝐢 > 𝟏. 𝟎 𝐕
• The output signal in this case remains greater than L VG VT 2 for all time
t. However, the small-signal output is now large enough so that the total
output voltage at times tries to exceed L VDD 15 . For these times, the
MOSFET will enter cutoff, and the output signal will be distorted.
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MOSFET Amplifier Distortion (contd.)
3. 𝐕𝐢 > 𝟏. 𝟔 𝐕
• In this case, the small-signal input signal is sufficiently large so that the total
output will attempt to exceed both limits (i.e., 𝑉𝐷𝐷 = 15.0 𝑉 and 𝑉𝐺 − 𝑉𝑇 =
2.0 𝑉). Therefore, there are periods of time when the MOSFET will be in cutoff,
and periods when the MOSFET will be in saturation.
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Effect of Input / Output Loading

Signal swing:
– Upswing limited by resistive divider:

– Downswing not affected by loading

Voltage gain:
• input loading (RS): no effect because gate does not draw current
• output loading (RL): It detracts from voltage gain because it draws current.
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Common Source (CS) Amplifier
Major Limitations:
• Increase in Av by increasing the RD leads to smaller VD i.e, the
voltage VDS → essentially limits the voltage swing
• RD difficult to fabricate in smaller chip area → a major constraint
for ICs
• Problems with the precision of RD
Active loads overcome these problems
• Diode-connected load (FETs in which drain and gate are tied to work as
resistors)
• Current source (such as a FET operating in saturation mode)
• FET operating in triode mode

• We can make a two terminal device from a

MOSFET by connecting the gate and the drain!
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Diode-Connected Load or Enhancement Load
Q: How does this “enhancement load” resemble a resistor?
A: For this we need to consider the i-v curves for both.

For a Resistor

• Now consider the same curve for an enhancement load.

• Since the gate is tied to the drain, we find 𝑣𝐺 = 𝑣𝐷 , and thus 𝑣𝐺𝑆 = 𝑣𝐷𝑆 . As
a result, we find that 𝑣𝐷𝑆 > 𝑣𝐺𝑆 − 𝑉𝑇 always.
• Therefore, we find that if 𝑣𝐺𝑆 > 𝑉𝑇 , the MOSFET will be in saturation (𝑖𝐷 =
𝐾(𝑣𝐺𝑆 − 𝑉𝑇 )2 ), whereas if 𝑣𝐺𝑆 < 𝑉𝑇 , the MOSFET is in cutoff (𝑖𝐷 = 0).
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Diode-Connected Load (contd.)
0 for v  VT
• Since for enhancement load 𝑖 = 𝑖𝐷 and 
𝑣 = 𝑣𝐺𝑆 , we can describe the i 

 K v VT 
2
enhancement load as: for v  VT

• So, resistors and enhancement loads are

far from exactly the same, but:

1) They both have 𝑖 = 0 when 𝑣 = 0.

2) They both have increasing current i
with increasing voltage v.
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Diode-Connected Load (contd.) Therefore, we can build a common
source amplifier with either a
resistor, or in the case of an
integrated circuit, an enhancement
load.

For the diode-connected load

amplifier, the load line is replaced
with a load curve (𝑣 = 𝑉𝐷𝐷 − 𝑣𝐷𝑆 )!

And the transfer

function of the
CS Amplifier is:
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Diode-Connected Load - Analysis
Step 1 - DC Analysis I
If, 𝑉 > 𝑉𝑇 then 𝐼 = 𝐾(𝑉 − 𝑉𝑇 )2 or: V 
K
 VT

gm  2K VGS  VT   2K V  VT 

Step 2 – Determine gm and ro

1 1 1
ro   
 ID  I K V  VT 2

Step 3 – Determine the small-signal circuit

You need to replace all enhancement loads with this small-signal model whenever
you are attempting to find the small-signal circuit of any MOSFET amplifier.
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CS Amplifier with Diode-connected load
Q: What is the small-signal open-circuit voltage gain, input
resistance, and output resistance of this amplifier?
A: The values that we will determine when we follow precisely
the same steps as before!!

• Let’s ASSUME that

ID1  K1 VGS 1  VT 1 
2

both M1 and M2 are

 K1 VG  VT 1 
2

in saturation. Then
Step 1 – DC Analysis we ENFORCE:

• Continuing with the

ANALYSIS, we can find the
drain current through the
enhancement load (ID2),
I  K V  V 
2
D2 2 GS 2 T2
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CS Amplifier with Diode-connected Load (contd.)
ID1  ID 2 K1
VGS 2  V  V   VT 2
K1 VG  VT 1   K2 VGS 2  VT 2 
2 2
K2 G T 1

• Since 𝑉𝐷𝑆2 = 𝑉𝐺𝑆2 and K1

VDS 2 
K1
V  V   VT 2 VDS 1  VDD  VT 2  V  V 
K2 G T 1
𝑉𝐷𝑆1 = 𝑉𝐷𝐷 − 𝑉𝐷𝑆2 , we can K2 G T 1
likewise state that:

Now, we must CHECK to see if our assumption is correct.

• The saturation assumption will be correct if: K1 VGS 1  VT 1  if VG  VT 1

VDS2  V  V   V
K2 G T 1 T 2

gm1  2K1 VG  VT 1  and gm2  2K2 VGS 2  VT 2 

Step 2 – Calculate small-signal parameters 1 1

ro1  and ro2 
1 ID 2 ID
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CS Amplifier with Diode-connected Load (contd.)
Step 3 – Determine the small-signal circuit
• First, let’s turn off the DC sources:
• We now replace MOSFET M1 with its equivalent small- M2
signal model, and replace the diode-connected load
with its equivalent small-signal model. vO(t)
M1
+
vi(t) _
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CS Amplifier with Diode-Connected Load (contd.)
• We find that: v gs1  vi v gs 2  vo

vo  (gm1 v gs 1  gm2 v gs 2 ) (ro1 ro2 )

 (gm1 vi  gm2 vo ) (ro1 ro2 )

• Rearranging, we find:
vo (ro1 ro2 )gm1 g
Avo    m1
vi 1  (ro1 ro2 )gm2 gm2

Strong main device and

• Therefore: Avo 
 gm1 2 K1 ID K W L 
1
weak load device gives
  1  higher gain
gm2 2 K2 ID K2
W L 
2

In other words, we adjust the MOSFET channel geometry to set the

small-signal gain of this amplifier!
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CS Amplifier with Diode-Connected Load (contd.)
• Now let’s determine the
small-signal input and output
resistances of this amplifier!
v
• It is evident that: Ri  i  
i

• Now for the output resistance, we know that the

vooc  (gm1 v gs 1  gm2 v gs 2 ) (ro1 ro2 )
open-circuit output voltage is:

• Likewise, the short-circuit

output current is:
ios  (gm1 v gs 1  gm2 v gs 2 )

vooc (gm1 v gs 1  gm2 v gs 2 ) (ro1 ro2 )

• Thus, the small-signal output resistance Ro    (ro1 ro2 )
iosc (gm1 v gs 1  gm2 v gs 2 )
of this amplifier is equal to:
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CS Amplifier with Diode-Connected Load (contd.)
1
Diode-connected load RD 
g m 2  g mb 2
1 g m1 1 g mb 2
Av   g m RD   g m1  Av   
g m 2  g mb 2 gm2 1   gm2
Main device
2 nCox (W / L)1 I D1 1
 Av  
2 nCox (W / L) 2 I D 2 1

• If variation of η with the output voltage is neglected → the gain is

independent of bias currents and voltages
• However, for this to happen the device M1 has to remain in saturation → this
ensures that current ID1 is constant → ensures constant gm1
• In other words, the gain remains relatively constant for the variation in input
and output signals → ensures that input-output relationship is linear
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CS Amplifier with Constant Current Source
• Now consider this NMOS amplifier
using a current source.
• Note no resistors or capacitors are
present!
• This is a common source amplifier.
• ID stability is not a problem!

A: Remember, every
real current source
(as with every voltage
Q: I don’t source) has a source
understand! resistance 𝒓𝒐 . A
Wouldn’t the more accurate
small-signal current source model
circuit be: is therefore:
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CS Amplifier with Constant Current Source (contd.)
Ideally, 𝑟𝑜 = ∞. However, for good current sources, this output resistance is large
(e.g., 𝑟𝑜 = 100 𝑘Ω). Thus, we mostly ignore this value (i.e., approximate it as 𝑟𝑜 =
∞), but there are some circuits where this resistance makes quite a difference. →
This is one of those circuits!

• Therefore, a more accurate • And so the small-signal circuit

amplifier circuit schematic is: becomes the familiar:
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CS Amplifier with Constant Current Source (contd.)

• Therefore, the small signal model is:

Now go ahead and do the analysis

Constant Current Source

PFET ideal current source

NFET ideal current source
• As long as a MOS transistor is in saturation region and λ=0, the current is
independent of the drain voltage and it behaves as an ideal current source
seen from the drain terminal.
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Constant Current Source (contd.)

Example of poor current source

• Since the variation of the source voltage directly affects the current of a MOS
transistor, it does not operate as a good current source if seen from the source
terminal