Stp80Pf55: P-Channel 55V - 0.016 - 80A To-220 Stripfet Ii Power Mosfet

STP80PF55
P-CHANNEL 55V - 0.016 Ω - 80A TO-220

STripFET II POWER MOSFET
PRELIMINARY DATA
TYPE VDSS RDS(on) ID
STB80PF55 55 V < 0.018 Ω 80 A

■ TYPICAL RDS(on) = 0.016 Ω
■ EXCEPTIONAL dv/dt CAPABILITY
■ 100% AVALANCHE TESTED
■ APPLICATION ORIENTED
CHARACTERIZATION
3
2
1
DESCRIPTION
This Power MOSFET is the latest development of TO-220
STMicroelectronis unique ”Single Feature Size ”
strip-based process. The resulting transistor
shows extremely high packing density for low on-
resistance, rugged avalanche characteristics and
less critical alignment steps therefore a remark-
able manufacturing reproducibility. INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
■ MOTOR CONTROL
■ DC-DC & DC-AC CONVERTERS
ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit
V DS Drain-source Voltage (VGS = 0) 55 V
V DGR Drain-gate Voltage (RGS = 20 kΩ) 55 V
VGS Gate- source Voltage ± 16 V
ID(*) Drain Current (continuos) at TC = 25°C 80 A
ID Drain Current (continuos) at TC = 100°C 57 A
IDM(•) Drain Current (pulsed) 320 A
Ptot Total Dissipation at TC = 25°C 300 W
Derating Factor 2 W/°C
dv/dt (1) Peak Diode Recovery voltage slope 7 V/ns
E AS (2) Single Pulse Avalanche Energy 1.4 mJ
Tstg Storage Temperature
-55 to 175 °C
Tj Max. Operating Junction Temperature
(•) Pulse width limit ed by safe operating area Note: For the P-CHANNEL MOSFET actual polarity of voltages and
(*) Current Limited by Package current has to be reversed
(1) ISD ≤ 40A, di/dt ≤ 300A/µs, VDD ≤ V (BR)DSS, Tj ≤ TJMAX.
(2) Starting Tj = 25 oC, ID = 80A, VDD = 40V
February 2002 1/6

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
STP80PF55
THERMAL DATA
Rthj-case Thermal Resistance Junction-case Max 0.5 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
Tl Maximum Lead Temperature For Soldering Purpose Typ 300 °C
ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified)

OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source ID = 250 µA, VGS = 0 55 V

Breakdown Voltage
IDSS Zero Gate Voltage VDS = Max Rating 1 µA

Drain Current (V GS = 0) VDS = Max Rating TC = 125°C 10 µA
Gate-body Leakage VGS = ± 16 V ±100 nA

IGSS
Current (VDS = 0)
ON (*)
VGS(th) Gate Threshold Voltage VDS = VGS ID = 250 µA 2 3 4 V
R DS(on) Static Drain-source On VGS = 10 V ID = 40 A 0.016 0.018 Ω

Resistance
DYNAMIC
g fs Forward Transconductance VDS > ID(on) x RDS(on)max, 32 S

ID = 40 A
C iss Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 5500 pF

Coss Output Capacitance 1130 pF
Crss Reverse Transfer 600 pF
Capacitance
2/6
STP80PF55
ELECTRICAL CHARACTERISTICS (continued)

SWITCHING ON (*)
td(on) Turn-on Delay Time VDD = 25 V I D = 40 A 35 ns

tr Rise Time R G = 4.7 Ω V GS = 10 V 190 ns
(Resistive Load, Figure 3)
Qg Total Gate Charge VDD= 25 V ID = 80 A VGS= 10V 190 258 nC
Qgs Gate-Source Charge 27 nC
Q gd Gate-Drain Charge 65 nC
SWITCHING OFF (*)

td(off) Turn-off Delay Time VDD = 25 V I D = 40 A 165 ns

tf Fall Time RG = 4.7 Ω VGS = 10 V 80 ns
(Resistive Load, Figure 3)
tr(Voff) Off-voltage Rise Time Vclamp = 40 V ID = 80 A 60 ns

tf Fall Time RG = 4.7 Ω VGS = 10 V 40 ns
tc Cross-over Time (Inductive Load, Figure 5) 85 ns
SOURCE DRAIN DIODE (*)

ISD Source-drain Current 80 A

ISDM (•) Source-drain Current (pulsed) 320 A
VSD (*) Forward On Voltage ISD = 80 A VGS = 0 1.3 V
trr Reverse Recovery Time ISD = 80 A di/dt = 100A/µs 110 ns

Qrr Reverse Recovery Charge VDD = 25 V T j = 150°C 495 nC
IRRM Reverse Recovery Current (see test circuit, Figure 5) 9 A
(*) Pulse width [ 300 µs, duty cycle 1.5 %.
(•) Pulse width limited by TJMAX
3/6
STP80PF55
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive Fig. 4: Gate Charge test Circuit
Load
Fig. 5: Test Circuit For Inductive Load Switching

And Diode Recovery Times
4/6
STP80PF55
TO-220 MECHANICAL DATA
mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
E
A
D
C
D1
L2
F1
G1
H2
G
Dia.
F
F2
L5
L9
L7
L6 L4
P011C
5/6
STP80PF55
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in lif e support devices or systems without express written approval of STMicroelectronics.
The ST logo is registered trademark of STMicroelectronics

 2002 STMicroelectronics - All Rights Reserved
All other names are the property of their respective owners.
STMicroelectronics GROUP OF COMPANIES

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Singapore - Spain - Sweden - Switzerland - United Kingdom - United States.
http://w ww.st.com
6/6
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STP80PF55

P-CHANNEL 55V - 0.016 Ω - 80A TO-220

TYPE VDSS RDS(on) ID

STB80PF55 55 V < 0.018 Ω 80 A

■ DC-DC & DC-AC CONVERTERS

ABSOLUTE MAXIMUM RATINGS

February 2002 1/6

ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified)

V(BR)DSS Drain-source ID = 250 µA, VGS = 0 55 V

IDSS Zero Gate Voltage VDS = Max Rating 1 µA

Gate-body Leakage VGS = ± 16 V ±100 nA

R DS(on) Static Drain-source On VGS = 10 V ID = 40 A 0.016 0.018 Ω

g fs Forward Transconductance VDS > ID(on) x RDS(on)max, 32 S

C iss Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 5500 pF

ELECTRICAL CHARACTERISTICS (continued)

td(on) Turn-on Delay Time VDD = 25 V I D = 40 A 35 ns

SWITCHING OFF (*)

td(off) Turn-off Delay Time VDD = 25 V I D = 40 A 165 ns

tr(Voff) Off-voltage Rise Time Vclamp = 40 V ID = 80 A 60 ns

SOURCE DRAIN DIODE (*)

ISD Source-drain Current 80 A

VSD (*) Forward On Voltage ISD = 80 A VGS = 0 1.3 V

trr Reverse Recovery Time ISD = 80 A di/dt = 100A/µs 110 ns

Fig. 5: Test Circuit For Inductive Load Switching

TO-220 MECHANICAL DATA

The ST logo is registered trademark of STMicroelectronics

All other names are the property of their respective owners.

STMicroelectronics GROUP OF COMPANIES

Datasheets for electronics components.

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