Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
Scribd Logo
Upload

Welcome to Scribd!

  • 19 views

    DSD w20dsd Gtu

    Uploaded by

    Sandeep kumar
    The document is an exam for a Digital System Design course covering topics like Boolean algebra, logic gates, flip flops, counters, converters, and modeling styles. It contains 8 questions with 3 parts each, worth a total of 56 marks. Students must attempt 4 questions covering concepts such as De Morgan's theorem, Moore machines, simplifying Boolean expressions, TTL vs CMOS characteristics, multiplexer implementation, synchronous counters, universal gates, ROM vs PLA vs PAL, half adder circuits, flip flop conversions, fan-in/fan-out, Johnson counters, BCD to excess 3 conversion, combinational vs sequential logic, Verilog modeling styles, magnitude comparators, Boolean expressions in product of max terms

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    DSD w20dsd Gtu

    Uploaded by

    Sandeep kumar
    19 views1 page
    The document is an exam for a Digital System Design course covering topics like Boolean algebra, logic gates, flip flops, counters, converters, and modeling styles. It contains 8 questions with 3 parts each, worth a total of 56 marks. Students must attempt 4 questions covering concepts such as De Morgan's theorem, Moore machines, simplifying Boolean expressions, TTL vs CMOS characteristics, multiplexer implementation, synchronous counters, universal gates, ROM vs PLA vs PAL, half adder circuits, flip flop conversions, fan-in/fan-out, Johnson counters, BCD to excess 3 conversion, combinational vs sequential logic, Verilog modeling styles, magnitude comparators, Boolean expressions in product of max terms

    Original Description:

    Original Title

    dsd w20dsd gtu

    Copyright

    © © All Rights Reserved

    Available Formats

    PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    The document is an exam for a Digital System Design course covering topics like Boolean algebra, logic gates, flip flops, counters, converters, and modeling styles. It contains 8 questions with 3 parts each, worth a total of 56 marks. Students must attempt 4 questions covering concepts such as De Morgan's theorem, Moore machines, simplifying Boolean expressions, TTL vs CMOS characteristics, multiplexer implementation, synchronous counters, universal gates, ROM vs PLA vs PAL, half adder circuits, flip flop conversions, fan-in/fan-out, Johnson counters, BCD to excess 3 conversion, combinational vs sequential logic, Verilog modeling styles, magnitude comparators, Boolean expressions in product of max terms

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    19 views1 page

    DSD w20dsd Gtu

    Uploaded by

    Sandeep kumar
    The document is an exam for a Digital System Design course covering topics like Boolean algebra, logic gates, flip flops, counters, converters, and modeling styles. It contains 8 questions with 3 parts each, worth a total of 56 marks. Students must attempt 4 questions covering concepts such as De Morgan's theorem, Moore machines, simplifying Boolean expressions, TTL vs CMOS characteristics, multiplexer implementation, synchronous counters, universal gates, ROM vs PLA vs PAL, half adder circuits, flip flop conversions, fan-in/fan-out, Johnson counters, BCD to excess 3 conversion, combinational vs sequential logic, Verilog modeling styles, magnitude comparators, Boolean expressions in product of max terms

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 1

    Seat No.: ________ Enrolment No.

    ___________

    GUJARAT TECHNOLOGICAL UNIVERSITY


    BE- SEMESTER–III (NEW) EXAMINATION – WINTER 2020
    Subject Code:3131102 Date:04/03/2021
    Subject Name:Digital System Design
    Time:10:30 AM TO 12:30 PM Total Marks:56
    Instructions:
    1. Attempt any FOUR questions out of EIGHT questions.
    2. Make suitable assumptions wherever necessary.
    3. Figures to the right indicate full marks.
    MARKS

    Q.1 (a) State and prove De-Morgan’s Theorem. 03


    (b) Explain Moore machine. 04
    (c) Simplify the following Boolean expression by means of the Tabulation 07
    method.
    F(A,B,C,D) = ∑m (1,2,3,5,6,7,8,9,12,13,15).
    Q.2 (a) Give comparison of TTL and CMOS family. 03
    (b) Implement the given function using 8 X 1 multiplexer. 04
    F(A,B,C,D) = ∑m (0,1,2,3,5,8,9,11,14).
    (c) Design synchronous BCD counter using JK flip flop. 07

    Q.3 (a) Explain universal gates. 03


    (b) Compare ROM, PLA and PAL. 04
    (c) Design a counter to generate the repetitive sequence 0,1,2,4,3,6. 07

    Q.4 (a) Explain half adder circuit. 03


    (b) Convert SR Flip Flop to JK Flip Flop. 04
    (c) Design a counter to generate the repetitive sequence 0,3,5,7,4. 07

    Q.5 (a) Define: i) Fan-in ii) Fan-out iii) Propagation delay 03


    (b) Construct a Johnson counter with ten timing signals. 04
    (c) Design BCD to Excess 3 code converter. 07

    Q.6 (a) Compare combinational and sequential logic circuits. 03


    (b) Explain different modeling styles in Verilog. 04
    (c) Explain Dual Slope A/D converter in detail. 07

    Q.7 (a) Describe magnitude comparator. 03


    (b) Express the Boolean function F=AB+A’C in a product of max term. 04
    (c) Explain Emitter Coupled Logic (ECL) in detail. 07

    Q.8 (a) Explain briefly 3 line to 8 line decoder. 03


    (b) Explain Mealy machine. 04
    (c) Write a short note on 4-bit Universal Shift Register. 07
    **********

    You might also like