STD25NF10L

N-channel 100V - 0.030Ω - 25A - DPAK

Low gate charge STripFET™ II Power MOSFET

General features
Type VDSS RDS(on) ID
STD25NF10L 100V < 0.035Ω 25A

■ Exceptional dv/dt capability

3
■ 100% avalanche tested 1
■ Low threshold device
■ Logic level device DPAK

Description
This Power MOSFET series realized with
STMicroelectronics unique STripFET process has
specifically been designed to minimize input
capacitance and gate charge. It is therefore Internal schematic diagram
suitable as primary switch in advanced high-
efficiency isolated DC-DC converters for Telecom
and Computer application. It is also intended for
any application with low gate charge drive
requirements.

Applications
■ Switching application

Order codes
Part number Marking Package Packaging
STD25NF10LT4 D25NF10L DPAK Tape & reel

July 2006 Rev 2 1/13

www.st.com 13
Contents STD25NF10L

Contents

1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ............................. 6

3 Test circuit ................................................ 8

4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5 Packing mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

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STD25NF10L Electrical ratings

1 Electrical ratings

Table 1. Absolute maximum ratings

Symbol Parameter Value Unit

VDS Drain-source voltage (VGS = 0) 100 V

VDGR Drain-gate voltage (RGS = 20 kΩ) 100 V
VGS Gate- source voltage ± 16 V
ID(1) Drain current (continuous) at TC = 25°C 25 A
ID Drain current (continuous) at TC = 100°C 21 A
(2)
IDM Drain current (pulsed) 100 A
Ptot Total dissipation at TC = 25°C 100 W
Derating Factor 0.67 W/°C
dv/dt(3) Peak diode recovery avalanche energy 20 V/ns
(4)
EAS Single pulse avalanche energy 450 mJ
Tstg Storage temperature
-55 to 175 °C
Tj Max. operating junction temperature
1. Current limited by package
2. Pulse width limited by safe operating area.
3. ISD ≤25A, di/dt ≤300A/µs, VDD =V(BR)DSS, Tj ≤TJMAX
4. Starting Tj = 25 °C, ID = 12.5A VDD = 50V

Table 2. Thermal data

Rthj-case Thermal resistance junction-case max 1.5 °C/W
Rthj-pcb Thermal resistance junction-pcb max (1) 100 °C/W
TJ Maximum lead temperature for soldering purpose 275 °C
1. When Mounted on 1 inch2 FR-4 board, 2 oz of Cu.

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Electrical characteristics STD25NF10L

2 Electrical characteristics

(TCASE=25°C unless otherwise specified)

Table 3. On/off states

Symbol Parameter Test conditions Min. Typ. Max. Unit

Drain-source
V(BR)DSS ID = 250µA, VGS =0 100 V
breakdown voltage
VDS = Max rating
Zero gate voltage 1 µA
IDSS VDS = Max rating,
drain current (VGS = 0) 10 µA
TC = 125°C
Gate-body leakage
IGSS VGS = ± 16V ±100 nA
current (VDS = 0)
VGS(th) Gate threshold voltage VDS = VGS, ID = 250µA 1 2.5 V

Static drain-source on VGS = 10V, ID = 12.5A 0.030 0.035 Ω

RDS(on)
resistance VGS = 4.5V, ID = 12.5A 0.035 0.040 Ω

Table 4. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit

Forward
gfs (1) VDS = 15V, ID = 12.5A 24 S
transconductance
Input capacitance
Ciss 1710 pF
Output capacitance VDS = 25V, f = 1MHz,
Coss 250 pF
Reverse transfer VGS = 0
Crss 110 pF
capacitance
td(on) Turn-on delay time 20 ns
VDD = 50V, ID = 12.5A
tr Rise time 40 ns
RG = 4.7Ω VGS = 5V
td(off) Turn-off delay time 58 ns
(see Figure 13)
tf Fall time 20 ns
Qg Total gate charge VDD = 80V, ID = 25A, 38 52 nC
Qgs Gate-source charge VGS = 5V, RG = 4.7Ω 8.5 nC
Qgd Gate-drain charge (see Figure 14) 21 nC
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.

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STD25NF10L Electrical characteristics

Table 5. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

Source-drain current
ISD 25 A
Source-drain current
ISDM (1) 100 A
(pulsed)
VSD (2) Forward on voltage ISD = 25A, VGS = 0 1.5 V
trr Reverse recovery time ISD = 25A, di/dt = 100A/µs, 88 ns
Qrr Reverse recovery charge VDD = 50V, Tj = 150°C 317 nC
IRRM Reverse recovery current (see Figure 15) 7.2 A
1. Pulse width limited by safe operating area.
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %

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Electrical characteristics STD25NF10L

2.1 Electrical characteristics (curves)

Figure 1. Safe operating area Figure 2. Thermal impedance

Figure 3. Output characterisics Figure 4. Transfer characteristics

Figure 5. Transconductance Figure 6. Static drain-source on resistance

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STD25NF10L Electrical characteristics

Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variations

Figure 9. Normalized gate threshold voltage Figure 10. Normalized on resistance vs

vs temperature temperature

Figure 11. Source-drain diode forward Figure 12. Normalized breakdown voltage vs
characteristics temperature

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Test circuit STD25NF10L

3 Test circuit

Figure 13. Switching times test circuit for Figure 14. Gate charge test circuit
resistive load

Figure 15. Test circuit for inductive load Figure 16. Unclamped Inductive load test
switching and diode recovery times circuit

Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform

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STD25NF10L Package mechanical data

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK®

packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com

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Package mechanical data STD25NF10L

DPAK MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 2.2 2.4 0.086 0.094
A1 0.9 1.1 0.035 0.043
A2 0.03 0.23 0.001 0.009
B 0.64 0.9 0.025 0.035
b4 5.2 5.4 0.204 0.212
C 0.45 0.6 0.017 0.023
C2 0.48 0.6 0.019 0.023
D 6 6.2 0.236 0.244
D1 5.1 0.200
E 6.4 6.6 0.252 0.260
E1 4.7 0.185
e 2.28 0.090
e1 4.4 4.6 0.173 0.181
H 9.35 10.1 0.368 0.397
L 1 0.039
(L1) 2.8 0.110
L2 0.8 0.031
L4 0.6 1 0.023 0.039
R 0.2 0.008
V2 0° 8° 0° 8°

0068772-F

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STD25NF10L Packing mechanical data

5 Packing mechanical data

DPAK FOOTPRINT

All dimensions are in millimeters

TAPE AND REEL SHIPMENT

REEL MECHANICAL DATA

mm inch
DIM.
MIN. MAX. MIN. MAX.
A 330 12.992
B 1.5 0.059
C 12.8 13.2 0.504 0.520
D 20.2 0.795
G 16.4 18.4 0.645 0.724
N 50 1.968
T 22.4 0.881

BASE QTY BULK QTY

TAPE MECHANICAL DATA
2500 2500
mm inch
DIM.
MIN. MAX. MIN. MAX.
A0 6.8 7 0.267 0.275
B0 10.4 10.6 0.409 0.417
B1 12.1 0.476
D 1.5 1.6 0.059 0.063
D1 1.5 0.059
E 1.65 1.85 0.065 0.073
F 7.4 7.6 0.291 0.299
K0 2.55 2.75 0.100 0.108
P0 3.9 4.1 0.153 0.161
P1 7.9 8.1 0.311 0.319
P2 1.9 2.1 0.075 0.082
R 40 1.574
W 15.7 16.3 0.618 0.641

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Revision history STD25NF10L

6 Revision history

Table 6. Revision history

Date Revision Changes

21-Jun-2004 1 Preliminary version

03-Jun-2006 2 New template, no content change

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STD25NF10L

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