FDP51N25 / FDPF51N25 — N-Channel UniFETTM MOSFET

March 2016

FDP51N25 / FDPF51N25
N-Channel UniFETTM MOSFET
250 V, 51 A, 60 mΩ
Features Description
• RDS(on) = 48 mΩ(Typ.) @ VGS = 10 V, ID = 25.5 A UniFETTM MOSFET is Fairchild Semiconductor’s high voltage
• Low Gate Charge (Typ. 55 nC) MOSFET family based on planar stripe and DMOS technology.
• Low Crss (Typ. 63 pF) This MOSFET is tailored to reduce on-state resistance, and to
provide better switching performance and higher avalanche
Applications energy strength. This device family is suitable for switching
power converter applications such as power factor correction
• PDP TV (PFC), flat panel display (FPD) TV power, ATX and electronic
• Lighting lamp ballasts.
• Uninterruptible Power Supply
• AC-DC Power Supply
D

D D
GD G
S G G G
D S S
S TO-220F TO-220F
TO-220 TO-220F
Y-formed LG-formed
Absolute Maximum Ratings TC = 25°C unless otherwise noted. S
FDPF51N25
FDP51N25 FDPF51N25YDTU
Symbol Parameter FDPF51N25RDTU Unit
VDSS Drain-Source Voltage 250 V
ID Drain Current - Continuous (TC = 25° C) 51 51* A
- Continuous (TC = 100° C) 30 30* A
IDM Drain Current - Pulsed (Note 1)
204 204* A
VGSS Gate-Source voltage ± 30 V
EAS Single Pulsed Avalanche Energy (Note 2) 1111 mJ
IAR Avalanche Current (Note 1) 51 A
EAR Repetitive Avalanche Energy (Note 1) 32 mJ
VISO Insulation withstand voltage (RMS) from all three leads to
N/A 2500 V
external heat sink (t=0.3sec; TC = 25° C)
dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns
PD Power Dissipation (TC = 25°C) 320 38 W
- Derate Above 25°C 3.7 0.3 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TL Maximum Lead Temperature for Soldering,
300 °C
1/8” from Case for 5 Seconds
*Drain current limited by maximum junction temperature.

Thermal Characteristics
FDPF51N25
FDP51N25 FDPF51N25YDTU
Symbol Parameter FDPF51N25RDTU Unit
RθJC Thermal Resistance, Junction-to-Case, Max. 0.39 3.3 °C/W
RθJA Thermal Resistance, Junction-to-Ambient, Max. 62.5 62.5 °C/W

©2008 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com

FDP51N25 / FDPF51N25 Rev. 1.8
 FDP51N25 / FDPF51N25 — N-Channel UniFETTM MOSFET
Package Marking and Ordering Information
Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity
FDP51N25 FDP51N25 TO-220 Tube N/A N/A 50 units
FDPF51N25 FDPF51N25 TO-220F Tube N/A N/A 50 units
TO-220F
FDPF51N25YDTU FDPF51N25 Tube N/A N/A 50 units
(Y-formed)
TO-220F
FDPF51N25RDTU FDPF51N25 Tube N/A N/A 50 units
(LG-formed)

Electrical Characteristics TC = 25°C unless otherwise noted.

Symbol Parameter Conditions Min. Typ. Max. Unit

Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 μA, TJ = 25 °C 250 -- -- V
ΔBVDSS Breakdown Voltage Temperature
ID = 250 μA, Referenced to 25°C -- 0.25 -- V/°C
/ ΔTJ Coefficient
IDSS Zero Gate Voltage Drain Current VDS = 250 V, VGS = 0 V -- -- 1 μA
VDS = 200 V, TC = 125°C -- -- 10 μA
IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0V -- -- -100 nA
On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 μA 3.0 -- 5.0 V
RDS(on) Static Drain-Source
VGS = 10 V, ID = 25.5 A -- 0.048 0.060 Ω
On-Resistance
gFS Forward Transconductance VDS = 40 V, ID = 25.5 A -- 43 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V, -- 2620 3410 pF
Coss Output Capacitance f = 1 MHz -- 530 690 pF
Crss Reverse Transfer Capacitance -- 63 90 pF
Switching Characteristics
td(on) Turn-On Delay Time VDD = 125 V, ID = 51 A, -- 62 135 ns
tr Turn-On Rise Time VGS = 10 V, RG = 25 Ω -- 465 940 ns
td(off) Turn-Off Delay Time -- 98 205 ns
tf Turn-Off Fall Time (Note 4) -- 130 270 ns
Qg Total Gate Charge VDS = 200 V, ID = 51 A, -- 55 70 nC
Qgs Gate-Source Charge VGS = 10 V -- 16 -- nC
Qgd Gate-Drain Charge (Note 4) -- 27 -- nC
Drain-Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain-Source Diode Forward Current -- -- 51 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 204 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 51 A -- -- 1.4 V
trr Reverse Recovery Time VGS = 0 V, IS = 51 A, -- 178 -- ns
Qrr Reverse Recovery Charge dIF/dt =100 A/μs -- 4.0 -- μC
Notes:
1. Repetitive rating: pulse-width limited by maximum junction temperature.
2. L = 0.68 mH, IAS = 51 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25°C.
3. ISD ≤ 51 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, starting TJ = 25°C.
4. Essentially independent of operating temperature typical characteristics.

©2008 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com

FDP51N25 / FDPF51N25 Rev. 1.8
 FDP51N25 / FDPF51N25 — N-Channel UniFETTM MOSFET
Typical Performance Characteristics

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

VGS
2 Top : 15.0 V
10 10.0 V
2
8.0 V 10
7.0 V
6.5 V

ID, Drain Current [A]

ID, Drain Current [A]

6.0 V
Bottom : 5.5 V
o
150 C

1
10 o
10
1
25 C
o
-55 C

* Notes :
* Notes :
1. VDS = 40V
1. 250μs Pulse Test
o 2. 250μs Pulse Test
2. TC = 25 C
0 0
10 10
-1 0 1
10 10 10 2 4 6 8 10 12

VDS, Drain-Source Voltage [V] VGS, Gate-Source Voltage [V]

Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage

Drain Current and Gate Voltage Variation vs. Source Current
and Temperatue
RDS(ON) [Ω], Drain-Source On-Resistance

0.14
2
10
IDR, Reverse Drain Current [A]

0.12

0.10
VGS = 10V

1
0.08 10

VGS = 20V o
0.06 150 C
o
25 C * Notes :
1. VGS = 0V
0.04 o
* Note : TJ = 25 C 2. 250μs Pulse Test
0
10
0 25 50 75 100 125 150 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8

ID, Drain Current [A] VSD, Source-Drain voltage [V]

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

12
6000
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd 10 VDS = 50V
VGS, Gate-Source Voltage [V]

Crss = Cgd
VDS = 125V
Coss 8 VDS = 200V
4000
Capacitances [pF]

Ciss
6

4
2000
* Note ;
1. VGS = 0 V 2
Crss
2. f = 1 MHz
* Note : ID = 51A

0
0 0 10 20 30 40 50 60
-1 0 1
10 10 10 QG, Total Gate Charge [nC]
VDS, Drain-Source Voltage [V]

©2008 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com

FDP51N25 / FDPF51N25 Rev. 1.8
 FDP51N25 / FDPF51N25 — N-Channel UniFETTM MOSFET
Typical Performance Characteristics (Continued)

Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation

vs. Temperature vs. Temperature

1.2 3.0
Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
1.1
BVDSS, (Normalized)

RDS(ON), (Normalized)
2.0

1.0 1.5

1.0
0.9 * Notes :
1. VGS = 0 V
* Notes :
2. ID = 250 μA 0.5 1. VGS = 10 V
2. ID = 25.5 A

0.8 0.0
-100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200
o
TJ, Junction Temperature [ C] TJ, Junction Temperature [ C]
o

Figure 9-1. Maximum Safe Operating Area Figure 9-2. Maximum Safe Operating Area
for FDP51N25 for FDPF51N25 / FDPF51N25YDTU

2 10 μs 2
10 10 10 μs
100 μs
100 μs
1 ms
ID, Drain Current [A]

ID, Drain Current [A]

10 ms 1 ms
1 1
10 100 ms 10 10 ms
Operation in This Area DC 100 ms
is Limited by R DS(on) Operation in This Area
is Limited by R DS(on) DC
0 0
10 10

* Notes :
-1 o
1. TC = 25 C -1 * Notes :
10 10 o
o 1. TC = 25 C
2. TJ = 150 C o
2. TJ = 150 C
3. Single Pulse
3. Single Pulse
-2 -2
10 10
0 1 2 0 1 2
10 10 10 10 10 10

VDS, Drain-Source Voltage [V] VDS, Drain-Source Voltage [V]

Figure 10. Maximum Drain Current

vs. Case Temperature

60

50
ID, Drain Current [A]

40

30

20

10

0
25 50 75 100 125 150
o
TC, Case Temperature [ C]

©2008 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com

FDP51N25 / FDPF51N25 Rev. 1.8
 FDP51N25 / FDPF51N25 — N-Channel UniFETTM MOSFET
Typical Performance Characteristics (Continued)

Figure 11-1. Transient Thermal Response Curve for FDP51N25

[oC/W]
D=0.5

Response
Response
-1
10
0.2

0.1
Thermal

PDM
Thermal

0.05
t1
0.02 t2
* Notes :
Z (t),(t),

-2
10 0.01 0
1. Z θ JC (t) = 0.39 C/W Max.
θJC
ZθJC

2. Duty Factor, D=t1 /t 2

3. T JM - T C = P DM * Z θ JC (t)
single pulse

-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10

t 1 , Square W ave Pulse Duration [sec]

Figure 11-2. Transient Thermal Response Curve for FDPF51N25 / FDPF51N25YDTU

D=0.5
Response[oC/W]

0
10
0.2
ThermalResponse

0.1
PDM
0.05
(t), Thermal

t1
-1 t2
10 0.02
* Notes :
0.01
(t),

0
1. ZθJC(t) = 3.3 C/W Max.
ZθJC
θJC

2. Duty Factor, D=t1/t2

3. TJM - TC = PDM * ZθJC(t)
single pulse
-2
10
-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10

t1, Square Wave Pulse Duration [sec]

©2008 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com

FDP51N25 / FDPF51N25 Rev. 1.8
 FDP51N25 / FDPF51N25 — N-Channel UniFETTM MOSFET
VGS
Same Type
50KΩ
as DUT Qg
12V 200nF
300nF 10V
VDS
VGS Qgs Qgd

DUT
IG = const.
3mA

Charge

Figure 12. Gate Charge Test Circuit & Waveform

RL VDS
VDS 90%

VGS VDD
RG

10%
VGS
V
10V
GS
DUT
td(on) tr td(off)
tf
t on t off

Figure 13. Resistive Switching Test Circuit & Waveforms

L 1 BVDSS
VDS EAS = ---- L IAS2 --------------------
2 BVDSS - VDD
BVDSS
ID
IAS
RG
VDD ID (t)

V
10V
GS
GS DUT VDD VDS (t)
tp
tp Time

Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms

©2008 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com

FDP51N25 / FDPF51N25 Rev. 1.8
 FDP51N25 / FDPF51N25 — N-Channel UniFETTM MOSFET
DUT +

VDS

I SD
L

Driver
RG
Same Type
as DUT VDD

VGS • dv/dt controlled by RG

• ISD controlled by pulse period

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

I SD
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

VSD VDD

Body Diode
Forward Voltage Drop

Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

©2008 Fairchild Semiconductor Corporation 7 www.fairchildsemi.com

FDP51N25 / FDPF51N25 Rev. 1.8
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 SUPPLIER "B" PACKAGE
SHAPE
3.50
10.67
SUPPLIER "A" PACKAGE 9.65 E
SHAPE

3.40
2.50

16.30
IF PRESENT, SEE NOTE "D" 13.90
E
16.51 9.40
15.42 8.13 E

1 2 3 4.10
[2.46]
C 2.70

14.04
2.13 12.70

2.06

FRONT VIEWS

4.70 1.62 H 1.62

4.00 1.42 2.67 1.10
2.40
"A1" 8.65 1.00
SEE NOTE "F" 7.59 0.55

OPTIONAL 6.69
6.06
CHAMFER
E
14.30
11.50

NOTE "I" BOTTOM VIEW

NOTES:
A) REFERENCE JEDEC, TO-220, VARIATION AB
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS COMMON TO ALL PACKAGE
SUPPLIERS EXCEPT WHERE NOTED [ ].
3 2 1 D) LOCATION OF MOLDED FEATURE MAY VARY
(LOWER LEFT CORNER, LOWER CENTER
AND CENTER OF THE PACKAGE)
E DOES NOT COMPLY JEDEC STANDARD VALUE.
F) "A1" DIMENSIONS AS BELOW:
SINGLE GAUGE = 0.51 - 0.61
DUAL GAUGE = 1.10 - 1.45
G) DRAWING FILE NAME: TO220B03REV9
H PRESENCE IS SUPPLIER DEPENDENT
I) SUPPLIER DEPENDENT MOLD LOCKING HOLES
IN HEATSINK.

0.60
0.36 2.85 BACK VIEW
2.10
SIDE VIEW
0.50 A
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Datasheet contains the design specifications for product development. Specifications may change
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Rev. I77

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FDPF51N25 FDPF51N25YDTU