® L9997ND

DUAL HALF BRIDGE DRIVER

HALF BRIDGE OUTPUTS WITH TYPICAL

RON = 0.7Ω MULTIPOWER BCD TECHNOLOGY
OUTPUT CURRENT CAPABILITY ±1.2A
OPERATING SUPPLY VOLTAGE RANGE 7V
TO 16.5V
SUPPLY OVERVOLTAGE PROTECTION
FUNCTION FOR VVS UP TO 40V
VERY LOW QUIESCENT CURRENT IN
STANDBY MODE < 1µA
CMOS COMPATIBLE INPUTS WITH HYS-
TERESIS
SO20 (12+4+4)
OUTPUT SHORT-CIRCUIT PROTECTION
THERMAL SHUTDOWN ORDERING NUMBERS: L9997ND
REAL TIME DIAGNOSTIC: THERMAL OVER- L9997ND013TR
LOAD, OVERVOLTAGE

DESCRIPTION
including DC motors. The circuit is optimized for
The L9997ND is a monolithic integrated driver, in automotive electronics enviromental conditions.
BCD technology intended to drive various loads,

BLOCK DIAGRAM

VS VS DIAG
11
1

EN
REFERENCE PROTECTION
10 ENABLE
BIAS FUNCTIONS
5V

VS

IN1 OUT1
12 DRIVER 1 19

M
VS

IN2 OUT2
9 DRIVER 2 2

GND
4...7, 14...17

September 2013 DocID6276 Rev 3 1/9

L9997ND

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit
VVSDC DC Supply Voltage -0.3 to 26 V
VVSP Supply Voltage Pulse (T < 400ms) 40 V
IOUT DC Output Current ±1.8 A
VIN1,2 DC Input Voltage -0.3 to 7 V
VEN Enable Input Voltage -0.3 to 7 V
VDIAG DC Output Voltage -0.3 to 7 V
IOUT DC Output Short-circuit Current -0.3V < VOUT < VS + 0.3V internally limited
IDIAG DC Sink Current -0.3V < VDG < 7V internally limited

PIN CONNECTION (Top view)

VS 1 20 N.C.
OUT2 2 19 OUT1
N.C. 3 18 N.C.
GND 4 17 GND
GND 5 16 GND
GND 6 15 GND
GND 7 14 GND
N.C. 8 13 N.C.
IN2 9 12 IN1
EN 10 11 DIAG
D95AT166

PIN FUNCTIONS
N. Name Function
1 VS Supply Voltage
2 OUT2 Channel 2: Push-Pull power output with intrinsic body diode
3, 8, 13, NC NC: Not Connected
18,20
4 to 7, GND Ground: signal - and power - ground, heat sink
14 to 17
9 IN2 Input 2: Schmitt Trigger input with hysteresis (non-inverting signal control)
10 EN Enable: LOW or not connected on this input switches the device into standby mode and the
outputs into tristate
11 DIAG Diagnostic: Open Drain Output that switches LOW if overvoltage or overtemperature is
detected
12 IN1 Input 1: Schmitt Trigger input with hysteresis (non-inverting signal control)

THERMAL DATA
Symbol Parameter Value Unit
TjTS Thermal Shut-down Junction Temperature 165 °C
TjTSH Thermal Shut-down Threshold Hysteresis 25 K
Rth j-amb Thermal Resistance Junction-Ambient (1) 50 K/W
Rth j-pins Thermal Resistance Junction-Pins 15 K/W
(1) With 6cm2 on board heatsink area.

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 L9997ND

ELECTRICAL CHARACTERISTICS (7V < VS < 16.5V; -40°C < TJ < 150°C; unless otherwise specified.)
Symbol Parameter Test Condition Min. Typ. Max. Unit
IVS_SB Quiescent Current in Standby VEN < 0.3V; VVS <16.5V; Tj < 85°(*) <1 90 µA
Mode VEN = 0; VVS = 14.5V; Tj = 25°C <1 10 µA
IVS Supply Current EN = HIGH, IOUT1,2 = 0 2 6 mA
VENL Low Enable Voltage 1.5 V
VENH High Enable Voltage 3.5 6 V
VENthh Enable Threshold Hysteresis 1 V
IEN Enable Input Current VEN = 5V 85 250 µA
VIN1,2L Low Input Voltage 1.5 V
VIN1,2H High Input Voltage 3.5 V
VIN1,2thh Input Threshold Hysteresis 1 V
IIN1,2 Input Bias Current VIN = 0 -3 0 1 µA
VIN = 5V, EN = HIGH 2 10 50 µA
RON OUT1,2 ON-Resistance to Supply or IOUT = ±0.8A; VVS = 7V; Tj = 125°C 1.2 2.8 Ω
GND IOUT = ±0.8A; VVS = 12V; Tj = 125°C 1.1 2.25 Ω
IOUT = ±0.8A; VVS = 12V; Tj = 25°C 0.7 Ω
|IOUT1,2| Output Current Limitation 1.2 1.6 2.2 A
VDIAG Diagnostic Output Drop IDIAG = 0.5mA, EN = HIGH 0.6 V
Overvoltage or Thermal Shut-
down
VVSOVth Supply Overvoltage 17 19 21 V
Threshold
tONLH Turn on Delay Time See Fig. 2; VVS = 13.5V 50 150 µs
Measured with 93Ω load
tONHL 30 150 µs
tOFFHL Turn off Delay Time 10 100 µs
tOFFLH 2 20 µs
tdHL Rising Delay Time 115 250 µs
tdLH Falling Delay Time 115 250 µs
trHS Rise Time 30 100 µs
trLS 60 150 µs
tfHS Fall Time 25 100 µs
tfLS 50 150 µs
* Tested at 125°C and guaranteed by correlation

FUNCTIONAL DESCRIPTION outputs, intended for driving dc motors in automo-

tive systems. The basic function of the device is
The L9997ND is a motor driver two half-bridge shown in the Table 1.

Table 1. Table function.

Status EN IN1 IN2 OUT1 OUT2 DIAG NOTE
1 L X X Tristate Tristate OFF Standby Mode
2 H H H SRC SRC OFF Recommended for braking
3 H H L SRC SNK OFF
4 H L H SNK SRC OFF
5 H L L SNK SNK OFF
6 H X X Tristate Tristate ON Overvoltage or Overtemperature

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L9997ND

The device is activated with enable input voltage put transistor changes in the current regulation
HIGH. For enable input floating (not connected) mode, see Fig.6, with the typical output current
or LOW the device is in Standby Mode. Very low value below 2A. The SRC output power DMOS
quiescent current is defined for VEN < 0.3V. When transistors requires a voltage drop ~3V to activate
activating or disactivating the device by the en- the current regulation. Below this voltage drop is
able input a wake-up time of 50µs is recom- the device also protected. The output current heat
mended. up the power DMOS transistor, the RDSON in-
creases with the junction temperature and de-
For braking of the motor the status 2 is recom- creases the output current. The power dissipation
mended. The reason for this recommendation is in this condition can activate the thermal shut-
that the device features higher threshold for ini- down . In the case of output disable due to ther-
tialisation of parasitic structures than in state 5. mal overload the output remains disabled untill
The inputs IN1, IN2 features internal sink current the junction temperature decreases under the
generators of 10µA, disabled in standby mode. thermal enable threshold.
With these input current generators the input level Permanent short circuit condition with power dis-
is forced to LOW for inputs open. In this condition sipation leading to chip overheating and activation
the outputs are in SNK state. of the thermal shut-down leads to the thermal os-
The circuit features an overvoltage disable func- cillation. The junction temperature difference be-
tion referred to the supply voltage VVS. This func- tween the switch ON and OFF points is the ther-
tion assures disabling the power outputs, when mal hysteresis of the thermal protection. This
the supply voltage exceeds the over voltage hysteresis together with the thermal impedance
threshold value of 19V typ. Both outputs are and ambient temperature determines the fre-
forced to tristate in this condition and the diagnos- quency of this thermal oscillation, its typical val-
tic output is ON. ues are in the range of 10kHz.
The thermal shut-down disables the outputs (tris- The open drain diagnostic output needs an exter-
tate) and activates the diagnostic when the junc- nal pull-up resistor to a 5V supply. In systems
tion temperature increases above the thermal with several L9997ND the diagnostic outputs can
shut-down threshold temperature of min. 150°C. be connected together with a common pull-up re-
For the start of a heavy loaded motor, if the motor sistor. The DIAG output current is internally lim-
current reaches the max. value, it is necessary to ited.
respect the dynamical thermal resistance junction Fig. 1 shows a typical application diagram for the
to ambient. The outputs OUT1 and OUT2 are pro- DC motor driving. To assure the safety of the cir-
tected against short circuit to GND or VS, for sup- cuit in the reverse battery condition a reverse pro-
ply voltages up to the overvoltage disable thresh- tection diode D1 is necessary. The transient pro-
old. tection diode D2 must assure that the maximal
The output power DMOS transistors works in lin- supply voltage VVS during the transients at the
ear mode for an output current less than 1.2A. In- VBAT line will be limited to a value lower than the
creasing the output load current (> 1.2A) the out- absolute maximum rating for VVS.

Figure 1: Application Circuit Diagram.

Is D1
5V VBAT
47KΩ CS D2
VS
IDIAG1
DIAG1
OUT1
IIN1 IM
IN1 IOUT1
CONTROL
LOGIC IIN2 L9997ND
IN2
VM
M
IEN
EN OUT2

IOUT2
GND
GND

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 L9997ND

Figure 2. Timing Diagram.

Standby Mode Operating Mode Overtemperature Standby Mode

or Overvoltage

EN

IN1
IN2

DIAG

t dLH t dHL t dLH t dHL t OFFLH

t ONHL

90%
OUT1 Tristate
Tristate Tristate
10%
tr tf
t ONLH t dHL t dLH t dHL t dLH t OFFHL

90%
Tristate Tristate
50%
OUT2 Tristate
10%

tr tf

Figure 3. Typical RON - Characteristics of Source and Sink Stage

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L9997ND

Figure 4. Quiescent current in standby mode versus supply voltage.

Figure 5. ON-Resistance versus supply voltage.

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 L9997ND

Figure 6. IOUT versus VOUT (pulsed measurement with TON = 500µs, TOFF = 500ms).

Figure 7. Test circuit.

100µF 200nF
12V
VS
10kΩ 5V
EN DIAG

IN1 OUT1 15Ω

L9997ND
IN2 OUT2 15 Ω

V VIN1 VIN2
EN
GND

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L9997ND

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 L9997ND

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DocID6276 Rev 3 9/9