STB80NE03L-06

STB80NE03L-06-1
N-CHANNEL 30V - 0.005Ω - 80A D2PAK / I2PAK
STripFET™ POWER MOSFET

TYPE VDSS RDS(on) ID

STB80NE03L-06 30 V < 0.006 Ω 80 A

STB80NE03L-06-1 30 V < 0.006 Ω 80 A
■ TYPICAL RDS(on) = 0.005 Ω
■ EXCEPTIONAL dv/dt CAPABILITY 3
1 3
■ LOW GATE CHARGE 100°C 12
■ 100% AVALANCHE TESTED

DESCRIPTION
This Power MOSFET is the latest development of D2PAK I2PAK
STMicroelectronics unique “Single Feature
Size™” strip-based process. The resulting transis-
tor shows extremely high packing density for low
on-resistance, rugged avalanche characteristics
and less critical alignment steps therefore a re- INTERNAL SCHEMATIC DIAGRAM
markable manufacturing reproducibility.

APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ SOLENOID AND RELAY DRIVERS

■ MOTOR CONTROL,AUDIO AMPLIFIERS

■ DC-DC & DC-AC CONVERTERS

■ AUTOMOTIVE ENVIRONMENT (INJECTION,

ABS, AIR-BAG, LAMPDRIVERS, Etc.)

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit
VDS Drain-source Voltage (VGS = 0) 30 V
VDGR Drain-gate Voltage (RGS = 20 kΩ) 30 V
VGS Gate- source Voltage ± 20 V
ID Drain Current (continuos) at TC = 25°C 80 A
ID Drain Current (continuos) at TC = 100°C 60 A
IDM (
) Drain Current (pulsed) 320 A
PTOT Total Dissipation at TC = 25°C 150 W
Derating Factor 1 W/°C
dv/dt (1) Peak Diode Recovery voltage slope 7 V/ns
Tstg Storage Temperature
– 55 to 175 °C
Tj Max. Operating Junction Temperature
(● ) Pulse width limited by safe operating area (1) ISD ≤804A, di/dt ≤300A/µs, VDD ≤ V(BR)DSS, T j ≤ TJMAX.

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STB80NE03L-06 / STB80NE03L-06-1

THERMAL DATA
Rthj-case Thermal Resistance Junction-case Max 1 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
Tl Maximum Lead Temperature For Soldering Purpose 300 °C

AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
IAR Avalanche Current, Repetitive or Not-Repetitive 80 A
(pulse width limited by Tj max)
EAS Single Pulse Avalanche Energy 600 mJ
(starting Tj = 25 °C, ID = IAR, VDD = 15 V)

ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)

OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source ID = 250 µA, VGS = 0 30 V
Breakdown Voltage
IDSS Zero Gate Voltage VDS = Max Rating 1 µA
Drain Current (VGS = 0)
VDS = Max Rating, TC = 125 °C 10 µA
IGSS Gate-body Leakage VGS = ± 20 V ± 100 nA
Current (VDS = 0)

ON (1)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA 1 1.7 2.5 V
RDS(on) Static Drain-source On VGS = 10 V, ID = 40 A 0.005 0.006 Ω
Resistance
VGS = 4.5 V, ID = 40 A 0.008 Ω

DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (1) Forward Transconductance VDS > ID(on) x RDS(on)max, 30 50 S
ID = 40 A
Ciss Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 6500 pF
Coss Output Capacitance 1500 pF
Crss Reverse Transfer 500 pF
Capacitance

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ELECTRICAL CHARACTERISTICS (CONTINUED)

SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on) Turn-on Delay Time VDD = 15 V, ID = 40 A 40 55 ns
RG = 4.7Ω VGS = 4.5 V
tr Rise Time (see test circuit, Figure 3) 260 350 ns

Qg Total Gate Charge VDD = 24 V, ID = 80A, 95 130 nC

Qgs Gate-Source Charge VGS = 5V 30 nC
Qgd Gate-Drain Charge 44 nC

SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
tr(Voff) Off-voltage Rise Time VDD = 24 V, ID = 80 A, 70 95 ns
tf Fall Time RG = 4.7Ω, VGS = 5V 165 220 ns
tc Cross-over Time (see test circuit, Figure 3) 250 340 ns

SOURCE DRAIN DIODE

Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD Source-drain Current 80 A
ISDM (2) Source-drain Current (pulsed) 320 A
VSD (1) Forward On Voltage ISD = 80 A, VGS = 0 1.5 V
trr Reverse Recovery Time ISD = 80 A, di/dt = 100A/µs, 75 ns
Qrr Reverse Recovery Charge VDD = 15 V, Tj = 150°C 0.14 nC
IRRM Reverse Recovery Current (see test circuit, Figure 5) 4 A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.

Safe Operating Area Thermal Impedence

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Output Characteristics Transfer Characteristics

Transconductance Static Drain-source On Resistance

Gate Charge vs Gate-source Voltage Capacitance Variations

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Normalized Gate Threshold Voltage vs Normalized On Resistance vs Temperature

Temperature

Source-drain Diode Forward Characteristics

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Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform

Fig. 3: Switching Times Test Circuit For Fig. 4: Gate Charge test Circuit
Resistive Load

Fig. 5: Test Circuit For Inductive Load Switching

And Diode Recovery Times

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D2PAK MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.

A 4.4 4.6 0.173 0.181

A1 2.49 2.69 0.098 0.106

A2 0.03 0.23 0.001 0.009

B 0.7 0.93 0.027 0.036

B2 1.14 1.7 0.044 0.067

C 0.45 0.6 0.017 0.023

C2 1.23 1.36 0.048 0.053

D 8.95 9.35 0.352 0.368

D1 8 0.315

E 10 10.4 0.393

E1 8.5 0.334

G 4.88 5.28 0.192 0.208

L 15 15.85 0.590 0.625

L2 1.27 1.4 0.050 0.055

L3 1.4 1.75 0.055 0.068

M 2.4 3.2 0.094 0.126

R 0.4 0.015

V2 0º 8º
3

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TO-262 (I2PAK) MECHANICAL DATA

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.

A 4.4 4.6 0.173 0.181

A1 2.49 2.69 0.098 0.106

B 0.7 0.93 0.027 0.036

B2 1.14 1.7 0.044 0.067

C 0.45 0.6 0.017 0.023

C2 1.23 1.36 0.048 0.053

D 8.95 9.35 0.352 0.368

e 2.4 2.7 0.094 0.106

E 10 10.4 0.393 0.409

L 13.1 13.6 0.515 0.531

L1 3.48 3.78 0.137 0.149

L2 1.27 1.4 0.050 0.055

C
A

A1
C2

B2
B

e
E

L1

L2 D L
P011P5/E

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