SSD 2
SSD 2
SSD 2
BJT is a 3 terminal semiconductor device which can act as a insulator or conductor based on the
applied input signal. Thus, a transistor can act as a switch or a amplifier,
Function of the Emitter is to supply electron
Directions are showing when the transistor is in active region
VBE = Voltage on the input side & VCE = Voltage on the output side
The graph shows kind of p-n junction forward bias curve and from above we can see that base-
emitter junction is in forward bias. Again, as the VCE increases the base current IB reduces.
VCE = VCB + VBE, If VBE is constant then as VCE ↑, VCB ↑
And so, the reverse bias voltage will also be ↑ & the depletion layer will get increased.
So the effective base width (mane base er actually joto width tar theke kome jabe, fole Ib o kome
jabe, then eto electron koi jabe? Of course, collector e jabe)
So, VCE ↑ = IB ↓
Output Characteristics
For active region,
As before VCE ↑ = IB ↓ = IC ↑
BJT as an amplifier transistor should always be in active region
Bita is treated as the current gain for the Common Emitter combination
This is the region in which transistor tends to behave as a closed switch. The transistor has the
effect of its collector and Emitter being shorted. The collector and Emitter currents are maximum
in this mode of operation. The figure below shows a transistor working in saturation region.
When
Base current Ib is 0 then its in cutoff region though Ic is not 0
Leakage current is following through the collector to emitter terminal when the base terminal is
open.
Now here is a fact that, here I am increasing the Voltage Vbse so more and more electrons are
being emitted from emitter, as a result Ib will increase.
Here is the graphical example
ß
So as a common collector configuration, the output current is Ie and the input current is Ib so the
ration of Ie and Ib is known as (gama, Γ , looking wired though) the current gain of common
collector configuration.
Relation between α, ß, Γ
Γ=
Here Common collector configuration provides very high input impedance and very low output
impedance, very high current gain, very low voltage gain
This configuration gains low power gain.
Chapter 4
What is Q point/bias point/quiescent point & load line?
BJT won’t amplify the input signal until we apply the DC power supply. Actually, the energy
needed to amplify the input signal also comes from the DC power supply.
The process of applying the DC voltage source to the BJT is known as the biasing.
Q is called the operating point because it tells us the operating voltage and current of the
transistor.
The operating point of a device, also known as bias point, quiescent point, or Q-point, is the
point on the output characteristics that shows the DC collector–emitter voltage (Vce) and the
collector current (Ic) with no input signal applied.
Stability Factor = Change in the operating point with change in the temperature.
Fixed bias configuration means when the IB (base current) is fixed / constant. So, the operating
point should also be constant. But as we know the operating point may change for other reasons.
Like change in temperature / change in VCE / RCB / RCE. We will discuss about it the way
forwards.
Fixed Bias
Redrawn:
For DC analysis
The capacitors will become open circuited because DC never passes through capacitor
Whenever the collector current is max, then the voltage VCE must be 0
and, VCE will be max when IC is 0 and so VCE (max) = VCC
Now look at the graph, that’s why IC max is denoted by VCC / RC and the VCE max is denoted by
VCC.
Now connect them by a line which Is known as load line which shows the possible values of the
operating point. The operating point will change if we change the value of RB, if RB is decreased
and so the value of IB will increased, see the graph at top. As a result, the operating point will
shift to the left.
How is the operating point is determined?
By putting the value of current VCE & IC
Again, if the value of RC is changed then the operating point will change in this way.
https://en.wikipedia.org/wiki/Bipolar_transistor_biasing
Now for the input side:
For output side
Example
so when Rb is less then ß will be cancelled out by ß+1 and Ic will be independent of ß
Its also known as the emitter stabilized biasing condition as by introducing the emitter register
the circuit tries to maintain the q point.
When RB = 0
In this configuration the collector current IC is almost independent of the value of ß.
Two supply / Dual Supply Bias Configuration
Here VE is negative by keeping RB = 0
As Ic = Ie then Ic is independent of ß
How small the value of Rb should be so that the operating point is almost independent of the
variation in ß?
Applying kvl
Last one in IB
If this statement is satisfied then the operating point will be stable against the variation of ß
BJT as switch
When BJT is at the cut-off region / saturation region the BJT acts as a switch.
When VBB is 0 or less than VBE then IB =0 (only for cut off region)
As IC = ß IB
So IC is also 0 (approax), so there will be no voltage drop and at the terminal (as in the pic) then voltage is
still VCC
If we measure the current IC in active region and saturation region then obviously the collector current
measured in the saturation region will be high, cause saturation region is named after when the collector
current in flowing at its highest rate in BJT.
How to find the saturation in BJT
Steps:
»VCE is 0 , then measure the saturated IC current.
» then measure the IB
»as we know for active region IC = ß IB , so now lets measure the IC by multiplying ß with IB
Now both IC will be measured if this IC is greater then the VCE =0 saturated current IC then it’s the
saturation region
When the input is 0 V the transistor will act in cut off region
But due to reverse saturaion current the resistance will be very high
Approximate Analysis
If the 1st term is very small it will be like the approaximate analysis
In voltage bias configuration how the operating point changes if there is a variation in ß
Lets find Thevenin voltage
Thevenin circuit